mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
1c363c7ccc
After adding display power domain for Exynos5250 in commit2d2c9a8d0a
("ARM: dts: add display power domain for exynos5250") the display on Chromebook Snow and others stopped working after boot. The reason for this suggested Andrzej Hajda: the DP clock was disabled. This clock is required by Display Port and is enabled by bootloader. However when FIMD driver probing was deferred, the display power domain was turned off. This effectively reset the value of DP clock enable register. When exynos-dp is later probed, the clock is not enabled and display is not properly configured: exynos-dp 145b0000.dp-controller: Timeout of video streamclk ok exynos-dp 145b0000.dp-controller: unable to config video Fixes:2d2c9a8d0a
("ARM: dts: add display power domain for exynos5250") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reported-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
16 lines
489 B
C
16 lines
489 B
C
/*
|
|
* Copyright (c) 2015 Samsung Electronics Co., Ltd.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
* option) any later version.
|
|
*/
|
|
|
|
#ifndef _EXYNOS_DRM_FIMD_H_
|
|
#define _EXYNOS_DRM_FIMD_H_
|
|
|
|
extern void fimd_dp_clock_enable(struct exynos_drm_crtc *crtc, bool enable);
|
|
|
|
#endif /* _EXYNOS_DRM_FIMD_H_ */
|