mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-17 22:46:40 +07:00
49d85d0342
HDCP compliant Repeaters can support max of 127 devices and max depth of 7 for downstream topology. If these max limits are exceeded, repeater will set the topology error flags MAX_CASCADE_EXCEEDED and/or MAX_DEVS_EXCEEDED in Bstatus followed by asserting READY/CP_IRQ for HDCP transmitter. This patch check for these error flags as soon as READY bit is asserted. Signed-off-by: Ramalingam C <ramalingam.c@intel.com> [seanpaul fixed checkpatch alignment issue] Signed-off-by: Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/1516254488-4971-5-git-send-email-ramalingam.c@intel.com
42 lines
1.2 KiB
C
42 lines
1.2 KiB
C
/* SPDX-License-Identifier: MIT */
|
|
/*
|
|
* Copyright (C) 2017 Google, Inc.
|
|
*
|
|
* Authors:
|
|
* Sean Paul <seanpaul@chromium.org>
|
|
*/
|
|
|
|
#ifndef _DRM_HDCP_H_INCLUDED_
|
|
#define _DRM_HDCP_H_INCLUDED_
|
|
|
|
/* Period of hdcp checks (to ensure we're still authenticated) */
|
|
#define DRM_HDCP_CHECK_PERIOD_MS (128 * 16)
|
|
|
|
/* Shared lengths/masks between HDMI/DVI/DisplayPort */
|
|
#define DRM_HDCP_AN_LEN 8
|
|
#define DRM_HDCP_BSTATUS_LEN 2
|
|
#define DRM_HDCP_KSV_LEN 5
|
|
#define DRM_HDCP_RI_LEN 2
|
|
#define DRM_HDCP_V_PRIME_PART_LEN 4
|
|
#define DRM_HDCP_V_PRIME_NUM_PARTS 5
|
|
#define DRM_HDCP_NUM_DOWNSTREAM(x) (x & 0x3f)
|
|
#define DRM_HDCP_MAX_CASCADE_EXCEEDED(x) (x & BIT(3))
|
|
#define DRM_HDCP_MAX_DEVICE_EXCEEDED(x) (x & BIT(7))
|
|
|
|
/* Slave address for the HDCP registers in the receiver */
|
|
#define DRM_HDCP_DDC_ADDR 0x3A
|
|
|
|
/* HDCP register offsets for HDMI/DVI devices */
|
|
#define DRM_HDCP_DDC_BKSV 0x00
|
|
#define DRM_HDCP_DDC_RI_PRIME 0x08
|
|
#define DRM_HDCP_DDC_AKSV 0x10
|
|
#define DRM_HDCP_DDC_AN 0x18
|
|
#define DRM_HDCP_DDC_V_PRIME(h) (0x20 + h * 4)
|
|
#define DRM_HDCP_DDC_BCAPS 0x40
|
|
#define DRM_HDCP_DDC_BCAPS_REPEATER_PRESENT BIT(6)
|
|
#define DRM_HDCP_DDC_BCAPS_KSV_FIFO_READY BIT(5)
|
|
#define DRM_HDCP_DDC_BSTATUS 0x41
|
|
#define DRM_HDCP_DDC_KSV_FIFO 0x43
|
|
|
|
#endif
|