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ccdb6be9ec
The UHCI controllers in Intel chipsets rely on a platform-specific non-PME mechanism for wakeup signalling. They can generate wakeup signals even though they don't support PME. We need to let the USB core know this so that it will enable runtime suspend for UHCI controllers. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: stable@vger.kernel.org
311 lines
8.4 KiB
C
311 lines
8.4 KiB
C
/*
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* UHCI HCD (Host Controller Driver) PCI Bus Glue.
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*
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* Extracted from uhci-hcd.c:
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* Maintainer: Alan Stern <stern@rowland.harvard.edu>
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*
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* (C) Copyright 1999 Linus Torvalds
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* (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
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* (C) Copyright 1999 Randy Dunlap
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* (C) Copyright 1999 Georg Acher, acher@in.tum.de
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* (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
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* (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
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* (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
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* (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
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* support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
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* (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
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* (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
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*/
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#include "pci-quirks.h"
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/*
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* Make sure the controller is completely inactive, unable to
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* generate interrupts or do DMA.
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*/
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static void uhci_pci_reset_hc(struct uhci_hcd *uhci)
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{
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uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
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}
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/*
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* Initialize a controller that was newly discovered or has just been
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* resumed. In either case we can't be sure of its previous state.
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*
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* Returns: 1 if the controller was reset, 0 otherwise.
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*/
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static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci)
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{
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return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)),
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uhci->io_addr);
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}
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/*
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* Store the basic register settings needed by the controller.
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* This function is called at the end of configure_hc in uhci-hcd.c.
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*/
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static void uhci_pci_configure_hc(struct uhci_hcd *uhci)
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{
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struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
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/* Enable PIRQ */
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pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
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/* Disable platform-specific non-PME# wakeup */
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if (pdev->vendor == PCI_VENDOR_ID_INTEL)
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pci_write_config_byte(pdev, USBRES_INTEL, 0);
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}
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static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
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{
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int port;
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switch (to_pci_dev(uhci_dev(uhci))->vendor) {
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default:
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break;
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case PCI_VENDOR_ID_GENESYS:
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/* Genesys Logic's GL880S controllers don't generate
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* resume-detect interrupts.
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*/
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return 1;
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case PCI_VENDOR_ID_INTEL:
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/* Some of Intel's USB controllers have a bug that causes
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* resume-detect interrupts if any port has an over-current
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* condition. To make matters worse, some motherboards
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* hardwire unused USB ports' over-current inputs active!
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* To prevent problems, we will not enable resume-detect
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* interrupts if any ports are OC.
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*/
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for (port = 0; port < uhci->rh_numports; ++port) {
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if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
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USBPORTSC_OC)
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return 1;
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}
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break;
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}
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return 0;
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}
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static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci)
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{
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int port;
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const char *sys_info;
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static const char bad_Asus_board[] = "A7V8X";
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/* One of Asus's motherboards has a bug which causes it to
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* wake up immediately from suspend-to-RAM if any of the ports
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* are connected. In such cases we will not set EGSM.
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*/
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sys_info = dmi_get_system_info(DMI_BOARD_NAME);
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if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
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for (port = 0; port < uhci->rh_numports; ++port) {
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if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
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USBPORTSC_CCS)
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return 1;
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}
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}
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return 0;
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}
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static int uhci_pci_init(struct usb_hcd *hcd)
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{
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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uhci->io_addr = (unsigned long) hcd->rsrc_start;
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uhci->rh_numports = uhci_count_ports(hcd);
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/* Intel controllers report the OverCurrent bit active on.
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* VIA controllers report it active off, so we'll adjust the
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* bit value. (It's not standardized in the UHCI spec.)
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*/
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if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA)
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uhci->oc_low = 1;
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/* HP's server management chip requires a longer port reset delay. */
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if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
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uhci->wait_for_hp = 1;
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/* Intel controllers use non-PME wakeup signalling */
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if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_INTEL)
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device_set_run_wake(uhci_dev(uhci), 1);
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/* Set up pointers to PCI-specific functions */
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uhci->reset_hc = uhci_pci_reset_hc;
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uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
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uhci->configure_hc = uhci_pci_configure_hc;
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uhci->resume_detect_interrupts_are_broken =
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uhci_pci_resume_detect_interrupts_are_broken;
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uhci->global_suspend_mode_is_broken =
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uhci_pci_global_suspend_mode_is_broken;
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/* Kick BIOS off this hardware and reset if the controller
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* isn't already safely quiescent.
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*/
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check_and_reset_hc(uhci);
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return 0;
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}
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/* Make sure the controller is quiescent and that we're not using it
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* any more. This is mainly for the benefit of programs which, like kexec,
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* expect the hardware to be idle: not doing DMA or generating IRQs.
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*
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* This routine may be called in a damaged or failing kernel. Hence we
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* do not acquire the spinlock before shutting down the controller.
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*/
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static void uhci_shutdown(struct pci_dev *pdev)
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{
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struct usb_hcd *hcd = pci_get_drvdata(pdev);
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uhci_hc_died(hcd_to_uhci(hcd));
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}
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#ifdef CONFIG_PM
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static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated);
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static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
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{
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
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int rc = 0;
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dev_dbg(uhci_dev(uhci), "%s\n", __func__);
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spin_lock_irq(&uhci->lock);
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if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
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goto done_okay; /* Already suspended or dead */
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/* All PCI host controllers are required to disable IRQ generation
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* at the source, so we must turn off PIRQ.
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*/
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pci_write_config_word(pdev, USBLEGSUP, 0);
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clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
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/* Enable platform-specific non-PME# wakeup */
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if (do_wakeup) {
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if (pdev->vendor == PCI_VENDOR_ID_INTEL)
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pci_write_config_byte(pdev, USBRES_INTEL,
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USBPORT1EN | USBPORT2EN);
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}
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done_okay:
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clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
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spin_unlock_irq(&uhci->lock);
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synchronize_irq(hcd->irq);
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/* Check for race with a wakeup request */
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if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
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uhci_pci_resume(hcd, false);
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rc = -EBUSY;
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}
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return rc;
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}
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static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
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{
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struct uhci_hcd *uhci = hcd_to_uhci(hcd);
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dev_dbg(uhci_dev(uhci), "%s\n", __func__);
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/* Since we aren't in D3 any more, it's safe to set this flag
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* even if the controller was dead.
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*/
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set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
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spin_lock_irq(&uhci->lock);
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/* Make sure resume from hibernation re-enumerates everything */
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if (hibernated) {
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uhci->reset_hc(uhci);
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finish_reset(uhci);
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}
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/* The firmware may have changed the controller settings during
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* a system wakeup. Check it and reconfigure to avoid problems.
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*/
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else {
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check_and_reset_hc(uhci);
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}
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configure_hc(uhci);
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/* Tell the core if the controller had to be reset */
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if (uhci->rh_state == UHCI_RH_RESET)
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usb_root_hub_lost_power(hcd->self.root_hub);
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spin_unlock_irq(&uhci->lock);
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/* If interrupts don't work and remote wakeup is enabled then
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* the suspended root hub needs to be polled.
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*/
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if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
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set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
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/* Does the root hub have a port wakeup pending? */
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usb_hcd_poll_rh_status(hcd);
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return 0;
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}
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#endif
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static const struct hc_driver uhci_driver = {
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.description = hcd_name,
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.product_desc = "UHCI Host Controller",
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.hcd_priv_size = sizeof(struct uhci_hcd),
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/* Generic hardware linkage */
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.irq = uhci_irq,
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.flags = HCD_USB11,
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/* Basic lifecycle operations */
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.reset = uhci_pci_init,
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.start = uhci_start,
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#ifdef CONFIG_PM
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.pci_suspend = uhci_pci_suspend,
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.pci_resume = uhci_pci_resume,
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.bus_suspend = uhci_rh_suspend,
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.bus_resume = uhci_rh_resume,
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#endif
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.stop = uhci_stop,
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.urb_enqueue = uhci_urb_enqueue,
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.urb_dequeue = uhci_urb_dequeue,
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.endpoint_disable = uhci_hcd_endpoint_disable,
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.get_frame_number = uhci_hcd_get_frame_number,
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.hub_status_data = uhci_hub_status_data,
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.hub_control = uhci_hub_control,
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};
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static const struct pci_device_id uhci_pci_ids[] = { {
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/* handle any USB UHCI controller */
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PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
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.driver_data = (unsigned long) &uhci_driver,
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}, { /* end: all zeroes */ }
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};
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MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
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static struct pci_driver uhci_pci_driver = {
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.name = (char *)hcd_name,
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.id_table = uhci_pci_ids,
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.probe = usb_hcd_pci_probe,
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.remove = usb_hcd_pci_remove,
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.shutdown = uhci_shutdown,
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#ifdef CONFIG_PM
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.driver = {
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.pm = &usb_hcd_pci_pm_ops
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},
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#endif
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};
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MODULE_SOFTDEP("pre: ehci_pci");
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