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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
466 lines
11 KiB
C
466 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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*
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* Copyright (C) IBM Corporation, 2005
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* Jeff Muizelaar, 2006, 2007
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* Pekka Paalanen, 2008 <pq@iki.fi>
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*
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* Derived from the read-mod example from relay-examples by Tom Zanussi.
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*/
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#define pr_fmt(fmt) "mmiotrace: " fmt
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#define DEBUG 1
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#include <linux/moduleparam.h>
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#include <linux/debugfs.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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#include <asm/pgtable.h>
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#include <linux/mmiotrace.h>
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#include <asm/e820/api.h> /* for ISA_START_ADDRESS */
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#include <linux/atomic.h>
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#include <linux/percpu.h>
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#include <linux/cpu.h>
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#include "pf_in.h"
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struct trap_reason {
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unsigned long addr;
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unsigned long ip;
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enum reason_type type;
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int active_traces;
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};
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struct remap_trace {
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struct list_head list;
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struct kmmio_probe probe;
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resource_size_t phys;
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unsigned long id;
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};
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/* Accessed per-cpu. */
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static DEFINE_PER_CPU(struct trap_reason, pf_reason);
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static DEFINE_PER_CPU(struct mmiotrace_rw, cpu_trace);
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static DEFINE_MUTEX(mmiotrace_mutex);
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static DEFINE_SPINLOCK(trace_lock);
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static atomic_t mmiotrace_enabled;
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static LIST_HEAD(trace_list); /* struct remap_trace */
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/*
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* Locking in this file:
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* - mmiotrace_mutex enforces enable/disable_mmiotrace() critical sections.
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* - mmiotrace_enabled may be modified only when holding mmiotrace_mutex
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* and trace_lock.
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* - Routines depending on is_enabled() must take trace_lock.
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* - trace_list users must hold trace_lock.
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* - is_enabled() guarantees that mmio_trace_{rw,mapping} are allowed.
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* - pre/post callbacks assume the effect of is_enabled() being true.
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*/
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/* module parameters */
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static unsigned long filter_offset;
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static bool nommiotrace;
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static bool trace_pc;
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module_param(filter_offset, ulong, 0);
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module_param(nommiotrace, bool, 0);
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module_param(trace_pc, bool, 0);
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MODULE_PARM_DESC(filter_offset, "Start address of traced mappings.");
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MODULE_PARM_DESC(nommiotrace, "Disable actual MMIO tracing.");
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MODULE_PARM_DESC(trace_pc, "Record address of faulting instructions.");
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static bool is_enabled(void)
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{
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return atomic_read(&mmiotrace_enabled);
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}
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static void print_pte(unsigned long address)
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{
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unsigned int level;
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pte_t *pte = lookup_address(address, &level);
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if (!pte) {
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pr_err("Error in %s: no pte for page 0x%08lx\n",
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__func__, address);
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return;
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}
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if (level == PG_LEVEL_2M) {
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pr_emerg("4MB pages are not currently supported: 0x%08lx\n",
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address);
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BUG();
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}
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pr_info("pte for 0x%lx: 0x%llx 0x%llx\n",
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address,
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(unsigned long long)pte_val(*pte),
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(unsigned long long)pte_val(*pte) & _PAGE_PRESENT);
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}
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/*
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* For some reason the pre/post pairs have been called in an
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* unmatched order. Report and die.
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*/
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static void die_kmmio_nesting_error(struct pt_regs *regs, unsigned long addr)
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{
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const struct trap_reason *my_reason = &get_cpu_var(pf_reason);
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pr_emerg("unexpected fault for address: 0x%08lx, last fault for address: 0x%08lx\n",
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addr, my_reason->addr);
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print_pte(addr);
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pr_emerg("faulting IP is at %pS\n", (void *)regs->ip);
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pr_emerg("last faulting IP was at %pS\n", (void *)my_reason->ip);
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#ifdef __i386__
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pr_emerg("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
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regs->ax, regs->bx, regs->cx, regs->dx);
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pr_emerg("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
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regs->si, regs->di, regs->bp, regs->sp);
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#else
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pr_emerg("rax: %016lx rcx: %016lx rdx: %016lx\n",
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regs->ax, regs->cx, regs->dx);
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pr_emerg("rsi: %016lx rdi: %016lx rbp: %016lx rsp: %016lx\n",
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regs->si, regs->di, regs->bp, regs->sp);
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#endif
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put_cpu_var(pf_reason);
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BUG();
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}
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static void pre(struct kmmio_probe *p, struct pt_regs *regs,
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unsigned long addr)
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{
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struct trap_reason *my_reason = &get_cpu_var(pf_reason);
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struct mmiotrace_rw *my_trace = &get_cpu_var(cpu_trace);
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const unsigned long instptr = instruction_pointer(regs);
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const enum reason_type type = get_ins_type(instptr);
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struct remap_trace *trace = p->private;
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/* it doesn't make sense to have more than one active trace per cpu */
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if (my_reason->active_traces)
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die_kmmio_nesting_error(regs, addr);
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else
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my_reason->active_traces++;
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my_reason->type = type;
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my_reason->addr = addr;
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my_reason->ip = instptr;
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my_trace->phys = addr - trace->probe.addr + trace->phys;
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my_trace->map_id = trace->id;
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/*
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* Only record the program counter when requested.
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* It may taint clean-room reverse engineering.
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*/
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if (trace_pc)
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my_trace->pc = instptr;
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else
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my_trace->pc = 0;
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/*
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* XXX: the timestamp recorded will be *after* the tracing has been
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* done, not at the time we hit the instruction. SMP implications
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* on event ordering?
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*/
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switch (type) {
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case REG_READ:
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my_trace->opcode = MMIO_READ;
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my_trace->width = get_ins_mem_width(instptr);
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break;
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case REG_WRITE:
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my_trace->opcode = MMIO_WRITE;
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my_trace->width = get_ins_mem_width(instptr);
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my_trace->value = get_ins_reg_val(instptr, regs);
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break;
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case IMM_WRITE:
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my_trace->opcode = MMIO_WRITE;
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my_trace->width = get_ins_mem_width(instptr);
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my_trace->value = get_ins_imm_val(instptr);
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break;
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default:
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{
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unsigned char *ip = (unsigned char *)instptr;
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my_trace->opcode = MMIO_UNKNOWN_OP;
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my_trace->width = 0;
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my_trace->value = (*ip) << 16 | *(ip + 1) << 8 |
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*(ip + 2);
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}
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}
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put_cpu_var(cpu_trace);
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put_cpu_var(pf_reason);
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}
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static void post(struct kmmio_probe *p, unsigned long condition,
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struct pt_regs *regs)
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{
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struct trap_reason *my_reason = &get_cpu_var(pf_reason);
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struct mmiotrace_rw *my_trace = &get_cpu_var(cpu_trace);
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/* this should always return the active_trace count to 0 */
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my_reason->active_traces--;
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if (my_reason->active_traces) {
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pr_emerg("unexpected post handler");
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BUG();
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}
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switch (my_reason->type) {
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case REG_READ:
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my_trace->value = get_ins_reg_val(my_reason->ip, regs);
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break;
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default:
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break;
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}
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mmio_trace_rw(my_trace);
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put_cpu_var(cpu_trace);
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put_cpu_var(pf_reason);
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}
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static void ioremap_trace_core(resource_size_t offset, unsigned long size,
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void __iomem *addr)
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{
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static atomic_t next_id;
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struct remap_trace *trace = kmalloc(sizeof(*trace), GFP_KERNEL);
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/* These are page-unaligned. */
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struct mmiotrace_map map = {
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.phys = offset,
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.virt = (unsigned long)addr,
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.len = size,
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.opcode = MMIO_PROBE
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};
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if (!trace) {
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pr_err("kmalloc failed in ioremap\n");
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return;
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}
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*trace = (struct remap_trace) {
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.probe = {
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.addr = (unsigned long)addr,
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.len = size,
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.pre_handler = pre,
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.post_handler = post,
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.private = trace
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},
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.phys = offset,
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.id = atomic_inc_return(&next_id)
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};
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map.map_id = trace->id;
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spin_lock_irq(&trace_lock);
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if (!is_enabled()) {
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kfree(trace);
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goto not_enabled;
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}
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mmio_trace_mapping(&map);
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list_add_tail(&trace->list, &trace_list);
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if (!nommiotrace)
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register_kmmio_probe(&trace->probe);
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not_enabled:
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spin_unlock_irq(&trace_lock);
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}
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void mmiotrace_ioremap(resource_size_t offset, unsigned long size,
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void __iomem *addr)
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{
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if (!is_enabled()) /* recheck and proper locking in *_core() */
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return;
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pr_debug("ioremap_*(0x%llx, 0x%lx) = %p\n",
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(unsigned long long)offset, size, addr);
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if ((filter_offset) && (offset != filter_offset))
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return;
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ioremap_trace_core(offset, size, addr);
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}
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static void iounmap_trace_core(volatile void __iomem *addr)
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{
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struct mmiotrace_map map = {
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.phys = 0,
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.virt = (unsigned long)addr,
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.len = 0,
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.opcode = MMIO_UNPROBE
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};
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struct remap_trace *trace;
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struct remap_trace *tmp;
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struct remap_trace *found_trace = NULL;
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pr_debug("Unmapping %p.\n", addr);
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spin_lock_irq(&trace_lock);
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if (!is_enabled())
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goto not_enabled;
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list_for_each_entry_safe(trace, tmp, &trace_list, list) {
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if ((unsigned long)addr == trace->probe.addr) {
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if (!nommiotrace)
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unregister_kmmio_probe(&trace->probe);
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list_del(&trace->list);
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found_trace = trace;
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break;
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}
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}
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map.map_id = (found_trace) ? found_trace->id : -1;
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mmio_trace_mapping(&map);
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not_enabled:
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spin_unlock_irq(&trace_lock);
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if (found_trace) {
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synchronize_rcu(); /* unregister_kmmio_probe() requirement */
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kfree(found_trace);
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}
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}
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void mmiotrace_iounmap(volatile void __iomem *addr)
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{
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might_sleep();
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if (is_enabled()) /* recheck and proper locking in *_core() */
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iounmap_trace_core(addr);
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}
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int mmiotrace_printk(const char *fmt, ...)
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{
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int ret = 0;
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va_list args;
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unsigned long flags;
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va_start(args, fmt);
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spin_lock_irqsave(&trace_lock, flags);
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if (is_enabled())
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ret = mmio_trace_printk(fmt, args);
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spin_unlock_irqrestore(&trace_lock, flags);
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va_end(args);
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return ret;
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}
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EXPORT_SYMBOL(mmiotrace_printk);
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static void clear_trace_list(void)
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{
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struct remap_trace *trace;
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struct remap_trace *tmp;
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/*
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* No locking required, because the caller ensures we are in a
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* critical section via mutex, and is_enabled() is false,
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* i.e. nothing can traverse or modify this list.
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* Caller also ensures is_enabled() cannot change.
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*/
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list_for_each_entry(trace, &trace_list, list) {
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pr_notice("purging non-iounmapped trace @0x%08lx, size 0x%lx.\n",
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trace->probe.addr, trace->probe.len);
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if (!nommiotrace)
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unregister_kmmio_probe(&trace->probe);
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}
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synchronize_rcu(); /* unregister_kmmio_probe() requirement */
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list_for_each_entry_safe(trace, tmp, &trace_list, list) {
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list_del(&trace->list);
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kfree(trace);
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}
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static cpumask_var_t downed_cpus;
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static void enter_uniprocessor(void)
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{
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int cpu;
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int err;
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if (downed_cpus == NULL &&
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!alloc_cpumask_var(&downed_cpus, GFP_KERNEL)) {
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pr_notice("Failed to allocate mask\n");
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goto out;
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}
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get_online_cpus();
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cpumask_copy(downed_cpus, cpu_online_mask);
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cpumask_clear_cpu(cpumask_first(cpu_online_mask), downed_cpus);
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if (num_online_cpus() > 1)
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pr_notice("Disabling non-boot CPUs...\n");
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put_online_cpus();
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for_each_cpu(cpu, downed_cpus) {
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err = cpu_down(cpu);
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if (!err)
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pr_info("CPU%d is down.\n", cpu);
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else
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pr_err("Error taking CPU%d down: %d\n", cpu, err);
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}
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out:
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if (num_online_cpus() > 1)
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pr_warning("multiple CPUs still online, may miss events.\n");
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}
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static void leave_uniprocessor(void)
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{
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int cpu;
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int err;
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if (downed_cpus == NULL || cpumask_weight(downed_cpus) == 0)
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return;
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pr_notice("Re-enabling CPUs...\n");
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for_each_cpu(cpu, downed_cpus) {
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err = cpu_up(cpu);
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if (!err)
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pr_info("enabled CPU%d.\n", cpu);
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else
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pr_err("cannot re-enable CPU%d: %d\n", cpu, err);
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}
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}
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#else /* !CONFIG_HOTPLUG_CPU */
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static void enter_uniprocessor(void)
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{
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if (num_online_cpus() > 1)
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pr_warning("multiple CPUs are online, may miss events. "
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"Suggest booting with maxcpus=1 kernel argument.\n");
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}
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static void leave_uniprocessor(void)
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{
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}
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#endif
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void enable_mmiotrace(void)
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{
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mutex_lock(&mmiotrace_mutex);
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if (is_enabled())
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goto out;
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if (nommiotrace)
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pr_info("MMIO tracing disabled.\n");
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kmmio_init();
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enter_uniprocessor();
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spin_lock_irq(&trace_lock);
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atomic_inc(&mmiotrace_enabled);
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spin_unlock_irq(&trace_lock);
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pr_info("enabled.\n");
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out:
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mutex_unlock(&mmiotrace_mutex);
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}
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void disable_mmiotrace(void)
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{
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mutex_lock(&mmiotrace_mutex);
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if (!is_enabled())
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goto out;
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spin_lock_irq(&trace_lock);
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atomic_dec(&mmiotrace_enabled);
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BUG_ON(is_enabled());
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spin_unlock_irq(&trace_lock);
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clear_trace_list(); /* guarantees: no more kmmio callbacks */
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leave_uniprocessor();
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kmmio_cleanup();
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pr_info("disabled.\n");
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out:
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mutex_unlock(&mmiotrace_mutex);
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}
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