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POWER9 has hardware bugs relating to transactional memory and thread reconfiguration (changes to hardware SMT mode). Specifically, the core does not have enough storage to store a complete checkpoint of all the architected state for all four threads. The DD2.2 version of POWER9 includes hardware modifications designed to allow hypervisor software to implement workarounds for these problems. This patch implements those workarounds in KVM code so that KVM guests see a full, working transactional memory implementation. The problems center around the use of TM suspended state, where the CPU has a checkpointed state but execution is not transactional. The workaround is to implement a "fake suspend" state, which looks to the guest like suspended state but the CPU does not store a checkpoint. In this state, any instruction that would cause a transition to transactional state (rfid, rfebb, mtmsrd, tresume) or would use the checkpointed state (treclaim) causes a "soft patch" interrupt (vector 0x1500) to the hypervisor so that it can be emulated. The trechkpt instruction also causes a soft patch interrupt. On POWER9 DD2.2, we avoid returning to the guest in any state which would require a checkpoint to be present. The trechkpt in the guest entry path which would normally create that checkpoint is replaced by either a transition to fake suspend state, if the guest is in suspend state, or a rollback to the pre-transactional state if the guest is in transactional state. Fake suspend state is indicated by a flag in the PACA plus a new bit in the PSSCR. The new PSSCR bit is write-only and reads back as 0. On exit from the guest, if the guest is in fake suspend state, we still do the treclaim instruction as we would in real suspend state, in order to get into non-transactional state, but we do not save the resulting register state since there was no checkpoint. Emulation of the instructions that cause a softpatch interrupt is handled in two paths. If the guest is in real suspend mode, we call kvmhv_p9_tm_emulation_early() to handle the cases where the guest is transitioning to transactional state. This is called before we do the treclaim in the guest exit path; because we haven't done treclaim, we can get back to the guest with the transaction still active. If the instruction is a case that kvmhv_p9_tm_emulation_early() doesn't handle, or if the guest is in fake suspend state, then we proceed to do the complete guest exit path and subsequently call kvmhv_p9_tm_emulation() in host context with the MMU on. This handles all the cases including the cases that generate program interrupts (illegal instruction or TM Bad Thing) and facility unavailable interrupts. The emulation is reasonably straightforward and is mostly concerned with checking for exception conditions and updating the state of registers such as MSR and CR0. The treclaim emulation takes care to ensure that the TEXASR register gets updated as if it were the guest treclaim instruction that had done failure recording, not the treclaim done in hypervisor state in the guest exit path. With this, the KVM_CAP_PPC_HTM capability returns true (1) even if transactional memory is not available to host userspace. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
167 lines
5.4 KiB
C
167 lines
5.4 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2008
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#ifndef __POWERPC_KVM_ASM_H__
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#define __POWERPC_KVM_ASM_H__
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#ifdef __ASSEMBLY__
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#ifdef CONFIG_64BIT
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#define PPC_STD(sreg, offset, areg) std sreg, (offset)(areg)
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#define PPC_LD(treg, offset, areg) ld treg, (offset)(areg)
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#else
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#define PPC_STD(sreg, offset, areg) stw sreg, (offset+4)(areg)
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#define PPC_LD(treg, offset, areg) lwz treg, (offset+4)(areg)
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#endif
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#endif
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/* IVPR must be 64KiB-aligned. */
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#define VCPU_SIZE_ORDER 4
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#define VCPU_SIZE_LOG (VCPU_SIZE_ORDER + 12)
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#define VCPU_SIZE_BYTES (1<<VCPU_SIZE_LOG)
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#define BOOKE_INTERRUPT_CRITICAL 0
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#define BOOKE_INTERRUPT_MACHINE_CHECK 1
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#define BOOKE_INTERRUPT_DATA_STORAGE 2
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#define BOOKE_INTERRUPT_INST_STORAGE 3
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#define BOOKE_INTERRUPT_EXTERNAL 4
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#define BOOKE_INTERRUPT_ALIGNMENT 5
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#define BOOKE_INTERRUPT_PROGRAM 6
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#define BOOKE_INTERRUPT_FP_UNAVAIL 7
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#define BOOKE_INTERRUPT_SYSCALL 8
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#define BOOKE_INTERRUPT_AP_UNAVAIL 9
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#define BOOKE_INTERRUPT_DECREMENTER 10
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#define BOOKE_INTERRUPT_FIT 11
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#define BOOKE_INTERRUPT_WATCHDOG 12
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#define BOOKE_INTERRUPT_DTLB_MISS 13
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#define BOOKE_INTERRUPT_ITLB_MISS 14
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#define BOOKE_INTERRUPT_DEBUG 15
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/* E500 */
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#ifdef CONFIG_SPE_POSSIBLE
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#define BOOKE_INTERRUPT_SPE_UNAVAIL 32
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#define BOOKE_INTERRUPT_SPE_FP_DATA 33
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#define BOOKE_INTERRUPT_SPE_FP_ROUND 34
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#endif
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#ifdef CONFIG_PPC_E500MC
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#define BOOKE_INTERRUPT_ALTIVEC_UNAVAIL 32
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#define BOOKE_INTERRUPT_ALTIVEC_ASSIST 33
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#endif
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#define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35
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#define BOOKE_INTERRUPT_DOORBELL 36
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#define BOOKE_INTERRUPT_DOORBELL_CRITICAL 37
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/* booke_hv */
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#define BOOKE_INTERRUPT_GUEST_DBELL 38
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#define BOOKE_INTERRUPT_GUEST_DBELL_CRIT 39
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#define BOOKE_INTERRUPT_HV_SYSCALL 40
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#define BOOKE_INTERRUPT_HV_PRIV 41
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#define BOOKE_INTERRUPT_LRAT_ERROR 42
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/* book3s */
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#define BOOK3S_INTERRUPT_SYSTEM_RESET 0x100
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#define BOOK3S_INTERRUPT_MACHINE_CHECK 0x200
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#define BOOK3S_INTERRUPT_DATA_STORAGE 0x300
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#define BOOK3S_INTERRUPT_DATA_SEGMENT 0x380
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#define BOOK3S_INTERRUPT_INST_STORAGE 0x400
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#define BOOK3S_INTERRUPT_INST_SEGMENT 0x480
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#define BOOK3S_INTERRUPT_EXTERNAL 0x500
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#define BOOK3S_INTERRUPT_EXTERNAL_LEVEL 0x501
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#define BOOK3S_INTERRUPT_EXTERNAL_HV 0x502
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#define BOOK3S_INTERRUPT_ALIGNMENT 0x600
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#define BOOK3S_INTERRUPT_PROGRAM 0x700
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#define BOOK3S_INTERRUPT_FP_UNAVAIL 0x800
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#define BOOK3S_INTERRUPT_DECREMENTER 0x900
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#define BOOK3S_INTERRUPT_HV_DECREMENTER 0x980
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#define BOOK3S_INTERRUPT_DOORBELL 0xa00
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#define BOOK3S_INTERRUPT_SYSCALL 0xc00
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#define BOOK3S_INTERRUPT_TRACE 0xd00
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#define BOOK3S_INTERRUPT_H_DATA_STORAGE 0xe00
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#define BOOK3S_INTERRUPT_H_INST_STORAGE 0xe20
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#define BOOK3S_INTERRUPT_H_EMUL_ASSIST 0xe40
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#define BOOK3S_INTERRUPT_HMI 0xe60
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#define BOOK3S_INTERRUPT_H_DOORBELL 0xe80
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#define BOOK3S_INTERRUPT_H_VIRT 0xea0
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#define BOOK3S_INTERRUPT_PERFMON 0xf00
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#define BOOK3S_INTERRUPT_ALTIVEC 0xf20
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#define BOOK3S_INTERRUPT_VSX 0xf40
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#define BOOK3S_INTERRUPT_FAC_UNAVAIL 0xf60
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#define BOOK3S_INTERRUPT_H_FAC_UNAVAIL 0xf80
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/* book3s_hv */
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#define BOOK3S_INTERRUPT_HV_SOFTPATCH 0x1500
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/*
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* Special trap used to indicate to host that this is a
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* passthrough interrupt that could not be handled
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* completely in the guest.
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*/
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#define BOOK3S_INTERRUPT_HV_RM_HARD 0x5555
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#define BOOK3S_IRQPRIO_SYSTEM_RESET 0
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#define BOOK3S_IRQPRIO_DATA_SEGMENT 1
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#define BOOK3S_IRQPRIO_INST_SEGMENT 2
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#define BOOK3S_IRQPRIO_DATA_STORAGE 3
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#define BOOK3S_IRQPRIO_INST_STORAGE 4
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#define BOOK3S_IRQPRIO_ALIGNMENT 5
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#define BOOK3S_IRQPRIO_PROGRAM 6
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#define BOOK3S_IRQPRIO_FP_UNAVAIL 7
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#define BOOK3S_IRQPRIO_ALTIVEC 8
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#define BOOK3S_IRQPRIO_VSX 9
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#define BOOK3S_IRQPRIO_FAC_UNAVAIL 10
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#define BOOK3S_IRQPRIO_SYSCALL 11
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#define BOOK3S_IRQPRIO_MACHINE_CHECK 12
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#define BOOK3S_IRQPRIO_DEBUG 13
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#define BOOK3S_IRQPRIO_EXTERNAL 14
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#define BOOK3S_IRQPRIO_DECREMENTER 15
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#define BOOK3S_IRQPRIO_PERFORMANCE_MONITOR 16
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#define BOOK3S_IRQPRIO_EXTERNAL_LEVEL 17
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#define BOOK3S_IRQPRIO_MAX 18
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#define BOOK3S_HFLAG_DCBZ32 0x1
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#define BOOK3S_HFLAG_SLB 0x2
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#define BOOK3S_HFLAG_PAIRED_SINGLE 0x4
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#define BOOK3S_HFLAG_NATIVE_PS 0x8
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#define BOOK3S_HFLAG_MULTI_PGSIZE 0x10
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#define BOOK3S_HFLAG_NEW_TLBIE 0x20
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#define BOOK3S_HFLAG_SPLIT_HACK 0x40
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#define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */
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#define RESUME_FLAG_HOST (1<<1) /* Resume host? */
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#define RESUME_FLAG_ARCH1 (1<<2)
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#define RESUME_FLAG_ARCH2 (1<<3)
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#define RESUME_GUEST 0
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#define RESUME_GUEST_NV RESUME_FLAG_NV
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#define RESUME_HOST RESUME_FLAG_HOST
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#define RESUME_HOST_NV (RESUME_FLAG_HOST|RESUME_FLAG_NV)
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#define KVM_GUEST_MODE_NONE 0
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#define KVM_GUEST_MODE_GUEST 1
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#define KVM_GUEST_MODE_SKIP 2
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#define KVM_GUEST_MODE_GUEST_HV 3
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#define KVM_GUEST_MODE_HOST_HV 4
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#define KVM_INST_FETCH_FAILED -1
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#endif /* __POWERPC_KVM_ASM_H__ */
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