linux_dsm_epyc7002/drivers/gpu/drm/arm/malidp_drv.h
Jamie Fox 1f23a56a46 drm/malidp: Enable MMU prefetch on Mali-DP650
Mali-DP650 supports warming up the SMMU translations, by sending
requsts to the SMMU before a buffer is read.

There are two modes supported:

- PARTIAL: could be enabled when the buffer is composed of 4K or 64K
  pages, the display hardware will send a configurable number of
  requests before the actual reading.

- FULL: could be enabled when the buffer is composed of 1M or 2M
  pages, the display hardware will send requests before reading for
  all pages composing the buffer.

This patch adds a mechanism for detecting the page size and set the
MMU prefetch mode if possible.

Changes since v1:
 - For imported buffers use the already populated
   drm_gem_cma_object.sgt instead of calling
   driver.gem_prime_get_sg_table, which works just for buffers
   allocated through the gem_cma API.

Signed-off-by: Jamie Fox <jamie.fox@arm.com>
Signed-off-by: Alexandru Gheorghe <alexandru-cosmin.gheorghe@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
[rebased and re-ordered functions]
Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
2018-10-02 11:59:36 +01:00

103 lines
2.7 KiB
C

/*
* (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
* Author: Liviu Dudau <Liviu.Dudau@arm.com>
*
* This program is free software and is provided to you under the terms of the
* GNU General Public License version 2 as published by the Free Software
* Foundation, and any use by you of this program is subject to the terms
* of such GNU licence.
*
* ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
*/
#ifndef __MALIDP_DRV_H__
#define __MALIDP_DRV_H__
#include <drm/drm_writeback.h>
#include <drm/drm_encoder.h>
#include <linux/mutex.h>
#include <linux/wait.h>
#include <linux/spinlock.h>
#include <drm/drmP.h>
#include "malidp_hw.h"
#define MALIDP_CONFIG_VALID_INIT 0
#define MALIDP_CONFIG_VALID_DONE 1
#define MALIDP_CONFIG_START 0xd0
struct malidp_error_stats {
s32 num_errors;
u32 last_error_status;
s64 last_error_vblank;
};
struct malidp_drm {
struct malidp_hw_device *dev;
struct drm_crtc crtc;
struct drm_writeback_connector mw_connector;
wait_queue_head_t wq;
struct drm_pending_vblank_event *event;
atomic_t config_valid;
u32 core_id;
#ifdef CONFIG_DEBUG_FS
struct malidp_error_stats de_errors;
struct malidp_error_stats se_errors;
/* Protects errors stats */
spinlock_t errors_lock;
#endif
};
#define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)
struct malidp_plane {
struct drm_plane base;
struct malidp_hw_device *hwdev;
const struct malidp_layer *layer;
};
enum mmu_prefetch_mode {
MALIDP_PREFETCH_MODE_NONE,
MALIDP_PREFETCH_MODE_PARTIAL,
MALIDP_PREFETCH_MODE_FULL,
};
struct malidp_plane_state {
struct drm_plane_state base;
/* size of the required rotation memory if plane is rotated */
u32 rotmem_size;
/* internal format ID */
u8 format;
u8 n_planes;
enum mmu_prefetch_mode mmu_prefetch_mode;
u32 mmu_prefetch_pgsize;
};
#define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
#define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)
struct malidp_crtc_state {
struct drm_crtc_state base;
u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
struct malidp_se_config scaler_config;
/* Bitfield of all the planes that have requested a scaled output. */
u8 scaled_planes_mask;
};
#define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)
int malidp_de_planes_init(struct drm_device *drm);
int malidp_crtc_init(struct drm_device *drm);
#ifdef CONFIG_DEBUG_FS
void malidp_error(struct malidp_drm *malidp,
struct malidp_error_stats *error_stats, u32 status,
u64 vblank);
#endif
/* often used combination of rotational bits */
#define MALIDP_ROTATED_MASK (DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)
#endif /* __MALIDP_DRV_H__ */