mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 15:56:45 +07:00
756d5282bf
In preparation to enabling -Wvla, remove VLAs and replace them with fixed-length arrays instead. >From a security viewpoint, the use of Variable Length Arrays can be a vector for stack overflow attacks. Also, in general, as the code evolves it is easy to lose track of how big a VLA can get. Thus, we can end up having segfaults that are hard to debug. Also, fixed as part of the directive to remove all VLAs from the kernel: https://lkml.org/lkml/2018/3/7/621 Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
913 lines
22 KiB
C
913 lines
22 KiB
C
/*
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* Copyright (c) 2013-2014 Samsung Electronics Co., Ltd
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* http://www.samsung.com
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*
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* Copyright (C) 2013 Google, Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <linux/bcd.h>
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#include <linux/regmap.h>
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#include <linux/rtc.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/samsung/core.h>
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#include <linux/mfd/samsung/irq.h>
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#include <linux/mfd/samsung/rtc.h>
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#include <linux/mfd/samsung/s2mps14.h>
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/*
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* Maximum number of retries for checking changes in UDR field
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* of S5M_RTC_UDR_CON register (to limit possible endless loop).
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*
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* After writing to RTC registers (setting time or alarm) read the UDR field
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* in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have
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* been transferred.
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*/
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#define UDR_READ_RETRY_CNT 5
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enum {
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RTC_SEC = 0,
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RTC_MIN,
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RTC_HOUR,
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RTC_WEEKDAY,
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RTC_DATE,
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RTC_MONTH,
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RTC_YEAR1,
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RTC_YEAR2,
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/* Make sure this is always the last enum name. */
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RTC_MAX_NUM_TIME_REGS
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};
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/*
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* Registers used by the driver which are different between chipsets.
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*
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* Operations like read time and write alarm/time require updating
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* specific fields in UDR register. These fields usually are auto-cleared
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* (with some exceptions).
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*
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* Table of operations per device:
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*
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* Device | Write time | Read time | Write alarm
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* =================================================
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* S5M8767 | UDR + TIME | | UDR
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* S2MPS11/14 | WUDR | RUDR | WUDR + RUDR
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* S2MPS13 | WUDR | RUDR | WUDR + AUDR
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* S2MPS15 | WUDR | RUDR | AUDR
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*/
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struct s5m_rtc_reg_config {
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/* Number of registers used for setting time/alarm0/alarm1 */
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unsigned int regs_count;
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/* First register for time, seconds */
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unsigned int time;
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/* RTC control register */
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unsigned int ctrl;
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/* First register for alarm 0, seconds */
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unsigned int alarm0;
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/* First register for alarm 1, seconds */
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unsigned int alarm1;
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/*
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* Register for update flag (UDR). Typically setting UDR field to 1
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* will enable update of time or alarm register. Then it will be
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* auto-cleared after successful update.
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*/
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unsigned int udr_update;
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/* Auto-cleared mask in UDR field for writing time and alarm */
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unsigned int autoclear_udr_mask;
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/*
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* Masks in UDR field for time and alarm operations.
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* The read time mask can be 0. Rest should not.
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*/
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unsigned int read_time_udr_mask;
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unsigned int write_time_udr_mask;
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unsigned int write_alarm_udr_mask;
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};
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/* Register map for S5M8763 and S5M8767 */
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static const struct s5m_rtc_reg_config s5m_rtc_regs = {
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.regs_count = 8,
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.time = S5M_RTC_SEC,
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.ctrl = S5M_ALARM1_CONF,
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.alarm0 = S5M_ALARM0_SEC,
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.alarm1 = S5M_ALARM1_SEC,
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.udr_update = S5M_RTC_UDR_CON,
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.autoclear_udr_mask = S5M_RTC_UDR_MASK,
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.read_time_udr_mask = 0, /* Not needed */
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.write_time_udr_mask = S5M_RTC_UDR_MASK | S5M_RTC_TIME_EN_MASK,
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.write_alarm_udr_mask = S5M_RTC_UDR_MASK,
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};
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/* Register map for S2MPS13 */
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static const struct s5m_rtc_reg_config s2mps13_rtc_regs = {
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.regs_count = 7,
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.time = S2MPS_RTC_SEC,
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.ctrl = S2MPS_RTC_CTRL,
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.alarm0 = S2MPS_ALARM0_SEC,
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.alarm1 = S2MPS_ALARM1_SEC,
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.udr_update = S2MPS_RTC_UDR_CON,
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.autoclear_udr_mask = S2MPS_RTC_WUDR_MASK,
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.read_time_udr_mask = S2MPS_RTC_RUDR_MASK,
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.write_time_udr_mask = S2MPS_RTC_WUDR_MASK,
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.write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS13_RTC_AUDR_MASK,
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};
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/* Register map for S2MPS11/14 */
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static const struct s5m_rtc_reg_config s2mps14_rtc_regs = {
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.regs_count = 7,
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.time = S2MPS_RTC_SEC,
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.ctrl = S2MPS_RTC_CTRL,
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.alarm0 = S2MPS_ALARM0_SEC,
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.alarm1 = S2MPS_ALARM1_SEC,
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.udr_update = S2MPS_RTC_UDR_CON,
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.autoclear_udr_mask = S2MPS_RTC_WUDR_MASK,
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.read_time_udr_mask = S2MPS_RTC_RUDR_MASK,
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.write_time_udr_mask = S2MPS_RTC_WUDR_MASK,
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.write_alarm_udr_mask = S2MPS_RTC_WUDR_MASK | S2MPS_RTC_RUDR_MASK,
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};
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/*
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* Register map for S2MPS15 - in comparison to S2MPS14 the WUDR and AUDR bits
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* are swapped.
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*/
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static const struct s5m_rtc_reg_config s2mps15_rtc_regs = {
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.regs_count = 7,
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.time = S2MPS_RTC_SEC,
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.ctrl = S2MPS_RTC_CTRL,
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.alarm0 = S2MPS_ALARM0_SEC,
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.alarm1 = S2MPS_ALARM1_SEC,
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.udr_update = S2MPS_RTC_UDR_CON,
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.autoclear_udr_mask = S2MPS_RTC_WUDR_MASK,
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.read_time_udr_mask = S2MPS_RTC_RUDR_MASK,
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.write_time_udr_mask = S2MPS15_RTC_WUDR_MASK,
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.write_alarm_udr_mask = S2MPS15_RTC_AUDR_MASK,
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};
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struct s5m_rtc_info {
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struct device *dev;
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struct i2c_client *i2c;
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struct sec_pmic_dev *s5m87xx;
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struct regmap *regmap;
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struct rtc_device *rtc_dev;
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int irq;
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enum sec_device_type device_type;
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int rtc_24hr_mode;
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const struct s5m_rtc_reg_config *regs;
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};
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static const struct regmap_config s5m_rtc_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = S5M_RTC_REG_MAX,
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};
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static const struct regmap_config s2mps14_rtc_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = S2MPS_RTC_REG_MAX,
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};
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static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm,
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int rtc_24hr_mode)
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{
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tm->tm_sec = data[RTC_SEC] & 0x7f;
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tm->tm_min = data[RTC_MIN] & 0x7f;
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if (rtc_24hr_mode) {
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tm->tm_hour = data[RTC_HOUR] & 0x1f;
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} else {
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tm->tm_hour = data[RTC_HOUR] & 0x0f;
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if (data[RTC_HOUR] & HOUR_PM_MASK)
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tm->tm_hour += 12;
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}
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tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f);
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tm->tm_mday = data[RTC_DATE] & 0x1f;
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tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1;
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tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100;
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tm->tm_yday = 0;
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tm->tm_isdst = 0;
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}
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static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data)
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{
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data[RTC_SEC] = tm->tm_sec;
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data[RTC_MIN] = tm->tm_min;
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if (tm->tm_hour >= 12)
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data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK;
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else
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data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK;
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data[RTC_WEEKDAY] = 1 << tm->tm_wday;
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data[RTC_DATE] = tm->tm_mday;
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data[RTC_MONTH] = tm->tm_mon + 1;
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data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0;
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if (tm->tm_year < 100) {
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pr_err("RTC cannot handle the year %d\n",
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1900 + tm->tm_year);
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return -EINVAL;
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} else {
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return 0;
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}
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}
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/*
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* Read RTC_UDR_CON register and wait till UDR field is cleared.
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* This indicates that time/alarm update ended.
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*/
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static int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info)
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{
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int ret, retry = UDR_READ_RETRY_CNT;
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unsigned int data;
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do {
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ret = regmap_read(info->regmap, info->regs->udr_update, &data);
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} while (--retry && (data & info->regs->autoclear_udr_mask) && !ret);
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if (!retry)
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dev_err(info->dev, "waiting for UDR update, reached max number of retries\n");
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return ret;
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}
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static int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info,
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struct rtc_wkalrm *alarm)
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{
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int ret;
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unsigned int val;
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switch (info->device_type) {
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case S5M8767X:
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case S5M8763X:
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ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val);
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val &= S5M_ALARM0_STATUS;
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break;
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case S2MPS15X:
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case S2MPS14X:
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case S2MPS13X:
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ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2,
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&val);
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val &= S2MPS_ALARM0_STATUS;
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break;
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default:
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return -EINVAL;
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}
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if (ret < 0)
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return ret;
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if (val)
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alarm->pending = 1;
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else
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alarm->pending = 0;
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return 0;
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}
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static int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info)
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{
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int ret;
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unsigned int data;
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ret = regmap_read(info->regmap, info->regs->udr_update, &data);
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if (ret < 0) {
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dev_err(info->dev, "failed to read update reg(%d)\n", ret);
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return ret;
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}
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data |= info->regs->write_time_udr_mask;
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ret = regmap_write(info->regmap, info->regs->udr_update, data);
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if (ret < 0) {
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dev_err(info->dev, "failed to write update reg(%d)\n", ret);
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return ret;
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}
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ret = s5m8767_wait_for_udr_update(info);
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return ret;
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}
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static int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info)
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{
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int ret;
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unsigned int data;
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ret = regmap_read(info->regmap, info->regs->udr_update, &data);
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if (ret < 0) {
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dev_err(info->dev, "%s: fail to read update reg(%d)\n",
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__func__, ret);
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return ret;
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}
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data |= info->regs->write_alarm_udr_mask;
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switch (info->device_type) {
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case S5M8763X:
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case S5M8767X:
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data &= ~S5M_RTC_TIME_EN_MASK;
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break;
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case S2MPS15X:
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case S2MPS14X:
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case S2MPS13X:
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/* No exceptions needed */
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break;
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default:
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return -EINVAL;
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}
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ret = regmap_write(info->regmap, info->regs->udr_update, data);
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if (ret < 0) {
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dev_err(info->dev, "%s: fail to write update reg(%d)\n",
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__func__, ret);
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return ret;
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}
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ret = s5m8767_wait_for_udr_update(info);
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/* On S2MPS13 the AUDR is not auto-cleared */
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if (info->device_type == S2MPS13X)
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regmap_update_bits(info->regmap, info->regs->udr_update,
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S2MPS13_RTC_AUDR_MASK, 0);
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return ret;
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}
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static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm)
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{
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tm->tm_sec = bcd2bin(data[RTC_SEC]);
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tm->tm_min = bcd2bin(data[RTC_MIN]);
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if (data[RTC_HOUR] & HOUR_12) {
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tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f);
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if (data[RTC_HOUR] & HOUR_PM)
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tm->tm_hour += 12;
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} else {
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tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f);
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}
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tm->tm_wday = data[RTC_WEEKDAY] & 0x07;
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tm->tm_mday = bcd2bin(data[RTC_DATE]);
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tm->tm_mon = bcd2bin(data[RTC_MONTH]);
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tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100;
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tm->tm_year -= 1900;
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}
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static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data)
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{
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data[RTC_SEC] = bin2bcd(tm->tm_sec);
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data[RTC_MIN] = bin2bcd(tm->tm_min);
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data[RTC_HOUR] = bin2bcd(tm->tm_hour);
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data[RTC_WEEKDAY] = tm->tm_wday;
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data[RTC_DATE] = bin2bcd(tm->tm_mday);
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data[RTC_MONTH] = bin2bcd(tm->tm_mon);
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data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100);
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data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100);
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}
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static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct s5m_rtc_info *info = dev_get_drvdata(dev);
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u8 data[RTC_MAX_NUM_TIME_REGS];
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int ret;
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if (info->regs->read_time_udr_mask) {
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ret = regmap_update_bits(info->regmap,
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info->regs->udr_update,
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info->regs->read_time_udr_mask,
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info->regs->read_time_udr_mask);
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if (ret) {
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dev_err(dev,
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"Failed to prepare registers for time reading: %d\n",
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ret);
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return ret;
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}
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}
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ret = regmap_bulk_read(info->regmap, info->regs->time, data,
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info->regs->regs_count);
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if (ret < 0)
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return ret;
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switch (info->device_type) {
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case S5M8763X:
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s5m8763_data_to_tm(data, tm);
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break;
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case S5M8767X:
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case S2MPS15X:
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case S2MPS14X:
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case S2MPS13X:
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s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode);
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break;
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default:
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return -EINVAL;
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}
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dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
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1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
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return 0;
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}
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static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct s5m_rtc_info *info = dev_get_drvdata(dev);
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u8 data[RTC_MAX_NUM_TIME_REGS];
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int ret = 0;
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switch (info->device_type) {
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case S5M8763X:
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s5m8763_tm_to_data(tm, data);
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break;
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case S5M8767X:
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case S2MPS15X:
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case S2MPS14X:
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case S2MPS13X:
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ret = s5m8767_tm_to_data(tm, data);
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break;
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default:
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return -EINVAL;
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}
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if (ret < 0)
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return ret;
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dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
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1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday);
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ret = regmap_raw_write(info->regmap, info->regs->time, data,
|
|
info->regs->regs_count);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = s5m8767_rtc_set_time_reg(info);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
|
|
{
|
|
struct s5m_rtc_info *info = dev_get_drvdata(dev);
|
|
u8 data[RTC_MAX_NUM_TIME_REGS];
|
|
unsigned int val;
|
|
int ret, i;
|
|
|
|
ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
|
|
info->regs->regs_count);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
switch (info->device_type) {
|
|
case S5M8763X:
|
|
s5m8763_data_to_tm(data, &alrm->time);
|
|
ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
alrm->enabled = !!val;
|
|
break;
|
|
|
|
case S5M8767X:
|
|
case S2MPS15X:
|
|
case S2MPS14X:
|
|
case S2MPS13X:
|
|
s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode);
|
|
alrm->enabled = 0;
|
|
for (i = 0; i < info->regs->regs_count; i++) {
|
|
if (data[i] & ALARM_ENABLE_MASK) {
|
|
alrm->enabled = 1;
|
|
break;
|
|
}
|
|
}
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
|
|
1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
|
|
alrm->time.tm_mday, alrm->time.tm_hour,
|
|
alrm->time.tm_min, alrm->time.tm_sec,
|
|
alrm->time.tm_wday);
|
|
|
|
ret = s5m_check_peding_alarm_interrupt(info, alrm);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info)
|
|
{
|
|
u8 data[RTC_MAX_NUM_TIME_REGS];
|
|
int ret, i;
|
|
struct rtc_time tm;
|
|
|
|
ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
|
|
info->regs->regs_count);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
|
|
dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
|
|
1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
|
|
tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
|
|
|
|
switch (info->device_type) {
|
|
case S5M8763X:
|
|
ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0);
|
|
break;
|
|
|
|
case S5M8767X:
|
|
case S2MPS15X:
|
|
case S2MPS14X:
|
|
case S2MPS13X:
|
|
for (i = 0; i < info->regs->regs_count; i++)
|
|
data[i] &= ~ALARM_ENABLE_MASK;
|
|
|
|
ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
|
|
info->regs->regs_count);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = s5m8767_rtc_set_alarm_reg(info);
|
|
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int s5m_rtc_start_alarm(struct s5m_rtc_info *info)
|
|
{
|
|
int ret;
|
|
u8 data[RTC_MAX_NUM_TIME_REGS];
|
|
u8 alarm0_conf;
|
|
struct rtc_time tm;
|
|
|
|
ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data,
|
|
info->regs->regs_count);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode);
|
|
dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
|
|
1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday,
|
|
tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday);
|
|
|
|
switch (info->device_type) {
|
|
case S5M8763X:
|
|
alarm0_conf = 0x77;
|
|
ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf);
|
|
break;
|
|
|
|
case S5M8767X:
|
|
case S2MPS15X:
|
|
case S2MPS14X:
|
|
case S2MPS13X:
|
|
data[RTC_SEC] |= ALARM_ENABLE_MASK;
|
|
data[RTC_MIN] |= ALARM_ENABLE_MASK;
|
|
data[RTC_HOUR] |= ALARM_ENABLE_MASK;
|
|
data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK;
|
|
if (data[RTC_DATE] & 0x1f)
|
|
data[RTC_DATE] |= ALARM_ENABLE_MASK;
|
|
if (data[RTC_MONTH] & 0xf)
|
|
data[RTC_MONTH] |= ALARM_ENABLE_MASK;
|
|
if (data[RTC_YEAR1] & 0x7f)
|
|
data[RTC_YEAR1] |= ALARM_ENABLE_MASK;
|
|
|
|
ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
|
|
info->regs->regs_count);
|
|
if (ret < 0)
|
|
return ret;
|
|
ret = s5m8767_rtc_set_alarm_reg(info);
|
|
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
|
|
{
|
|
struct s5m_rtc_info *info = dev_get_drvdata(dev);
|
|
u8 data[RTC_MAX_NUM_TIME_REGS];
|
|
int ret;
|
|
|
|
switch (info->device_type) {
|
|
case S5M8763X:
|
|
s5m8763_tm_to_data(&alrm->time, data);
|
|
break;
|
|
|
|
case S5M8767X:
|
|
case S2MPS15X:
|
|
case S2MPS14X:
|
|
case S2MPS13X:
|
|
s5m8767_tm_to_data(&alrm->time, data);
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__,
|
|
1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon,
|
|
alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min,
|
|
alrm->time.tm_sec, alrm->time.tm_wday);
|
|
|
|
ret = s5m_rtc_stop_alarm(info);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = regmap_raw_write(info->regmap, info->regs->alarm0, data,
|
|
info->regs->regs_count);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = s5m8767_rtc_set_alarm_reg(info);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (alrm->enabled)
|
|
ret = s5m_rtc_start_alarm(info);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int s5m_rtc_alarm_irq_enable(struct device *dev,
|
|
unsigned int enabled)
|
|
{
|
|
struct s5m_rtc_info *info = dev_get_drvdata(dev);
|
|
|
|
if (enabled)
|
|
return s5m_rtc_start_alarm(info);
|
|
else
|
|
return s5m_rtc_stop_alarm(info);
|
|
}
|
|
|
|
static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data)
|
|
{
|
|
struct s5m_rtc_info *info = data;
|
|
|
|
rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static const struct rtc_class_ops s5m_rtc_ops = {
|
|
.read_time = s5m_rtc_read_time,
|
|
.set_time = s5m_rtc_set_time,
|
|
.read_alarm = s5m_rtc_read_alarm,
|
|
.set_alarm = s5m_rtc_set_alarm,
|
|
.alarm_irq_enable = s5m_rtc_alarm_irq_enable,
|
|
};
|
|
|
|
static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info)
|
|
{
|
|
u8 data[2];
|
|
int ret;
|
|
|
|
switch (info->device_type) {
|
|
case S5M8763X:
|
|
case S5M8767X:
|
|
/* UDR update time. Default of 7.32 ms is too long. */
|
|
ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON,
|
|
S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US);
|
|
if (ret < 0)
|
|
dev_err(info->dev, "%s: fail to change UDR time: %d\n",
|
|
__func__, ret);
|
|
|
|
/* Set RTC control register : Binary mode, 24hour mode */
|
|
data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
|
|
data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
|
|
|
|
ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2);
|
|
break;
|
|
|
|
case S2MPS15X:
|
|
case S2MPS14X:
|
|
case S2MPS13X:
|
|
data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
|
|
ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
|
|
if (ret < 0)
|
|
break;
|
|
|
|
/*
|
|
* Should set WUDR & (RUDR or AUDR) bits to high after writing
|
|
* RTC_CTRL register like writing Alarm registers. We can't find
|
|
* the description from datasheet but vendor code does that
|
|
* really.
|
|
*/
|
|
ret = s5m8767_rtc_set_alarm_reg(info);
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
info->rtc_24hr_mode = 1;
|
|
if (ret < 0) {
|
|
dev_err(info->dev, "%s: fail to write controlm reg(%d)\n",
|
|
__func__, ret);
|
|
return ret;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int s5m_rtc_probe(struct platform_device *pdev)
|
|
{
|
|
struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent);
|
|
struct sec_platform_data *pdata = s5m87xx->pdata;
|
|
struct s5m_rtc_info *info;
|
|
const struct regmap_config *regmap_cfg;
|
|
int ret, alarm_irq;
|
|
|
|
if (!pdata) {
|
|
dev_err(pdev->dev.parent, "Platform data not supplied\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
|
|
if (!info)
|
|
return -ENOMEM;
|
|
|
|
switch (platform_get_device_id(pdev)->driver_data) {
|
|
case S2MPS15X:
|
|
regmap_cfg = &s2mps14_rtc_regmap_config;
|
|
info->regs = &s2mps15_rtc_regs;
|
|
alarm_irq = S2MPS14_IRQ_RTCA0;
|
|
break;
|
|
case S2MPS14X:
|
|
regmap_cfg = &s2mps14_rtc_regmap_config;
|
|
info->regs = &s2mps14_rtc_regs;
|
|
alarm_irq = S2MPS14_IRQ_RTCA0;
|
|
break;
|
|
case S2MPS13X:
|
|
regmap_cfg = &s2mps14_rtc_regmap_config;
|
|
info->regs = &s2mps13_rtc_regs;
|
|
alarm_irq = S2MPS14_IRQ_RTCA0;
|
|
break;
|
|
case S5M8763X:
|
|
regmap_cfg = &s5m_rtc_regmap_config;
|
|
info->regs = &s5m_rtc_regs;
|
|
alarm_irq = S5M8763_IRQ_ALARM0;
|
|
break;
|
|
case S5M8767X:
|
|
regmap_cfg = &s5m_rtc_regmap_config;
|
|
info->regs = &s5m_rtc_regs;
|
|
alarm_irq = S5M8767_IRQ_RTCA1;
|
|
break;
|
|
default:
|
|
dev_err(&pdev->dev,
|
|
"Device type %lu is not supported by RTC driver\n",
|
|
platform_get_device_id(pdev)->driver_data);
|
|
return -ENODEV;
|
|
}
|
|
|
|
info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR);
|
|
if (!info->i2c) {
|
|
dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg);
|
|
if (IS_ERR(info->regmap)) {
|
|
ret = PTR_ERR(info->regmap);
|
|
dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n",
|
|
ret);
|
|
goto err;
|
|
}
|
|
|
|
info->dev = &pdev->dev;
|
|
info->s5m87xx = s5m87xx;
|
|
info->device_type = platform_get_device_id(pdev)->driver_data;
|
|
|
|
if (s5m87xx->irq_data) {
|
|
info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq);
|
|
if (info->irq <= 0) {
|
|
ret = -EINVAL;
|
|
dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n",
|
|
alarm_irq);
|
|
goto err;
|
|
}
|
|
}
|
|
|
|
platform_set_drvdata(pdev, info);
|
|
|
|
ret = s5m8767_rtc_init_reg(info);
|
|
|
|
device_init_wakeup(&pdev->dev, 1);
|
|
|
|
info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc",
|
|
&s5m_rtc_ops, THIS_MODULE);
|
|
|
|
if (IS_ERR(info->rtc_dev)) {
|
|
ret = PTR_ERR(info->rtc_dev);
|
|
goto err;
|
|
}
|
|
|
|
if (!info->irq) {
|
|
dev_info(&pdev->dev, "Alarm IRQ not available\n");
|
|
return 0;
|
|
}
|
|
|
|
ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL,
|
|
s5m_rtc_alarm_irq, 0, "rtc-alarm0",
|
|
info);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
|
|
info->irq, ret);
|
|
goto err;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err:
|
|
i2c_unregister_device(info->i2c);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int s5m_rtc_remove(struct platform_device *pdev)
|
|
{
|
|
struct s5m_rtc_info *info = platform_get_drvdata(pdev);
|
|
|
|
i2c_unregister_device(info->i2c);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int s5m_rtc_resume(struct device *dev)
|
|
{
|
|
struct s5m_rtc_info *info = dev_get_drvdata(dev);
|
|
int ret = 0;
|
|
|
|
if (info->irq && device_may_wakeup(dev))
|
|
ret = disable_irq_wake(info->irq);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int s5m_rtc_suspend(struct device *dev)
|
|
{
|
|
struct s5m_rtc_info *info = dev_get_drvdata(dev);
|
|
int ret = 0;
|
|
|
|
if (info->irq && device_may_wakeup(dev))
|
|
ret = enable_irq_wake(info->irq);
|
|
|
|
return ret;
|
|
}
|
|
#endif /* CONFIG_PM_SLEEP */
|
|
|
|
static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume);
|
|
|
|
static const struct platform_device_id s5m_rtc_id[] = {
|
|
{ "s5m-rtc", S5M8767X },
|
|
{ "s2mps13-rtc", S2MPS13X },
|
|
{ "s2mps14-rtc", S2MPS14X },
|
|
{ "s2mps15-rtc", S2MPS15X },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(platform, s5m_rtc_id);
|
|
|
|
static struct platform_driver s5m_rtc_driver = {
|
|
.driver = {
|
|
.name = "s5m-rtc",
|
|
.pm = &s5m_rtc_pm_ops,
|
|
},
|
|
.probe = s5m_rtc_probe,
|
|
.remove = s5m_rtc_remove,
|
|
.id_table = s5m_rtc_id,
|
|
};
|
|
|
|
module_platform_driver(s5m_rtc_driver);
|
|
|
|
/* Module information */
|
|
MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
|
|
MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:s5m-rtc");
|