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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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159fd7b8d3
Writes to ZCR_EL1 are self-synchronising, and so may be expensive in typical implementations. This patch adopts the approach used for costly system register writes elsewhere in the kernel: the system register write is suppressed if it would not change the stored value. Since the common case will be that of switching between tasks that use the same vector length as one another, prediction hit rates on the conditional branch should be reasonably good, with lower expected amortised cost than the unconditional execution of a heavyweight self-synchronising instruction. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
61 lines
1.3 KiB
ArmAsm
61 lines
1.3 KiB
ArmAsm
/*
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* FP/SIMD state saving and restoring
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/fpsimdmacros.h>
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/*
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* Save the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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ENTRY(fpsimd_save_state)
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fpsimd_save x0, 8
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ret
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ENDPROC(fpsimd_save_state)
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/*
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* Load the FP registers.
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*
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* x0 - pointer to struct fpsimd_state
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*/
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ENTRY(fpsimd_load_state)
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fpsimd_restore x0, 8
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ret
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ENDPROC(fpsimd_load_state)
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#ifdef CONFIG_ARM64_SVE
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ENTRY(sve_save_state)
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sve_save 0, x1, 2
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ret
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ENDPROC(sve_save_state)
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ENTRY(sve_load_state)
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sve_load 0, x1, x2, 3, x4
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ret
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ENDPROC(sve_load_state)
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ENTRY(sve_get_vl)
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_sve_rdvl 0, 1
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ret
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ENDPROC(sve_get_vl)
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#endif /* CONFIG_ARM64_SVE */
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