linux_dsm_epyc7002/arch/x86/kernel/cpu
Linus Torvalds 72674d4800 A series of fixes for x86:
- Reset MXCSR in kernel_fpu_begin() to prevent using a stale user space
    value.
 
  - Prevent writing MSR_TEST_CTRL on CPUs which are not explicitly
    whitelisted for split lock detection. Some CPUs which do not support
    it crash even when the MSR is written to 0 which is the default value.
 
  - Fix the XEN PV fallout of the entry code rework
 
  - Fix the 32bit fallout of the entry code rework
 
  - Add more selftests to ensure that these entry problems don't come back.
 
  - Disable 16 bit segments on XEN PV. It's not supported because XEN PV
    does not implement ESPFIX64
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Merge tag 'x86-urgent-2020-07-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Thomas Gleixner:
 "A series of fixes for x86:

   - Reset MXCSR in kernel_fpu_begin() to prevent using a stale user
     space value.

   - Prevent writing MSR_TEST_CTRL on CPUs which are not explicitly
     whitelisted for split lock detection. Some CPUs which do not
     support it crash even when the MSR is written to 0 which is the
     default value.

   - Fix the XEN PV fallout of the entry code rework

   - Fix the 32bit fallout of the entry code rework

   - Add more selftests to ensure that these entry problems don't come
     back.

   - Disable 16 bit segments on XEN PV. It's not supported because XEN
     PV does not implement ESPFIX64"

* tag 'x86-urgent-2020-07-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/ldt: Disable 16-bit segments on Xen PV
  x86/entry/32: Fix #MC and #DB wiring on x86_32
  x86/entry/xen: Route #DB correctly on Xen PV
  x86/entry, selftests: Further improve user entry sanity checks
  x86/entry/compat: Clear RAX high bits on Xen PV SYSENTER
  selftests/x86: Consolidate and fix get/set_eflags() helpers
  selftests/x86/syscall_nt: Clear weird flags after each test
  selftests/x86/syscall_nt: Add more flag combinations
  x86/entry/64/compat: Fix Xen PV SYSENTER frame setup
  x86/entry: Move SYSENTER's regs->sp and regs->flags fixups into C
  x86/entry: Assert that syscalls are on the right stack
  x86/split_lock: Don't write MSR_TEST_CTRL on CPUs that aren't whitelisted
  x86/fpu: Reset MXCSR to default in kernel_fpu_begin()
2020-07-05 12:23:49 -07:00
..
mce A series of fixes for x86: 2020-07-05 12:23:49 -07:00
microcode
mtrr
resctrl x86/resctrl: Fix a NULL vs IS_ERR() static checker warning in rdt_cdp_peer_get() 2020-06-17 12:18:34 +02:00
.gitignore
acrn.c x86/entry: Convert various hypervisor vectors to IDTENTRY_SYSVEC 2020-06-11 15:15:15 +02:00
amd.c
aperfmperf.c
bugs.c A set of fixes and updates for x86: 2020-06-11 15:54:31 -07:00
cacheinfo.c
centaur.c x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup 2020-06-15 14:18:37 +02:00
common.c x86/cpu: Use pinning mask for CR4 bits needing to be 0 2020-06-18 11:41:32 +02:00
cpu.h x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup 2020-06-15 14:18:37 +02:00
cpuid-deps.c
cyrix.c
feat_ctl.c
hygon.c
hypervisor.c
intel_epb.c
intel_pconfig.c
intel.c x86/split_lock: Don't write MSR_TEST_CTRL on CPUs that aren't whitelisted 2020-06-30 14:09:31 +02:00
Makefile
match.c
mkcapflags.sh
mshyperv.c x86/entry: Convert various hypervisor vectors to IDTENTRY_SYSVEC 2020-06-11 15:15:15 +02:00
perfctr-watchdog.c
powerflags.c
proc.c
rdrand.c
scattered.c
topology.c
transmeta.c
tsx.c
umc.c
umwait.c KVM: VMX: Stop context switching MSR_IA32_UMWAIT_CONTROL 2020-06-22 20:54:57 -04:00
vmware.c
zhaoxin.c x86/cpu: Reinitialize IA32_FEAT_CTL MSR on BSP during wakeup 2020-06-15 14:18:37 +02:00