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890e48be8d
The pinctrl-ingenic driver now supports the JZ4725B SoC. Furthermore, the gpio-ingenic driver was dropped and the pinctrl-ingenic driver is now responsible for providing the GPIO functionality. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
73 lines
2.3 KiB
Plaintext
73 lines
2.3 KiB
Plaintext
Ingenic jz47xx pin controller
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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For the jz47xx SoCs, pin control is tightly bound with GPIO ports. All pins may
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be used as GPIOs, multiplexed device functions are configured within the
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GPIO port configuration registers and it is typical to refer to pins using the
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naming scheme "PxN" where x is a character identifying the GPIO port with
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which the pin is associated and N is an integer from 0 to 31 identifying the
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pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and
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PB31 is the last pin in GPIO port B. The jz4740 contains 4 GPIO ports, PA to
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PD, for a total of 128 pins. The jz4780 contains 6 GPIO ports, PA to PF, for a
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total of 192 pins.
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Required properties:
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--------------------
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- compatible: One of:
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- "ingenic,jz4740-pinctrl"
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- "ingenic,jz4725b-pinctrl"
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- "ingenic,jz4770-pinctrl"
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- "ingenic,jz4780-pinctrl"
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- reg: Address range of the pinctrl registers.
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Required properties for sub-nodes (GPIO chips):
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-----------------------------------------------
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- compatible: Must contain one of:
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- "ingenic,jz4740-gpio"
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- "ingenic,jz4770-gpio"
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- "ingenic,jz4780-gpio"
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- reg: The GPIO bank number.
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- interrupt-controller: Marks the device node as an interrupt controller.
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- interrupts: Interrupt specifier for the controllers interrupt.
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- #interrupt-cells: Should be 2. Refer to
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../interrupt-controller/interrupts.txt for more details.
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- gpio-controller: Marks the device node as a GPIO controller.
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- #gpio-cells: Should be 2. The first cell is the GPIO number and the second
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cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
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GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
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- gpio-ranges: Range of pins managed by the GPIO controller. Refer to
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../gpio/gpio.txt for more details.
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Example:
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--------
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pinctrl: pin-controller@10010000 {
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compatible = "ingenic,jz4740-pinctrl";
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reg = <0x10010000 0x400>;
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#address-cells = <1>;
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#size-cells = <0>;
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gpa: gpio@0 {
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compatible = "ingenic,jz4740-gpio";
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reg = <0>;
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gpio-controller;
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gpio-ranges = <&pinctrl 0 0 32>;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <28>;
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};
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};
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