mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-10 23:46:39 +07:00
d85816167b
The clock is really the device functional clock, not the interface clock. Rename it. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
108 lines
2.1 KiB
Plaintext
108 lines
2.1 KiB
Plaintext
/dts-v1/;
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/ {
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compatible = "renesas,edosk2674";
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&h8intc>;
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chosen {
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bootargs = "console=ttySC2,38400";
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stdout-path = &sci2;
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};
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aliases {
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serial0 = &sci0;
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serial1 = &sci1;
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serial2 = &sci2;
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};
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xclk: oscillator {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <33333333>;
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clock-output-names = "xtal";
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};
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pllclk: pllclk {
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compatible = "renesas,h8s2678-pll-clock";
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clocks = <&xclk>;
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#clock-cells = <0>;
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reg = <0xffff3b 1>, <0xffff45 1>;
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};
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core_clk: core_clk {
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compatible = "renesas,h8300-div-clock";
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clocks = <&pllclk>;
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#clock-cells = <0>;
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reg = <0xffff3b 1>;
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renesas,width = <3>;
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};
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fclk: fclk {
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compatible = "fixed-factor-clock";
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clocks = <&core_clk>;
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#clock-cells = <0>;
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clock-div = <1>;
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clock-mult = <1>;
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};
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memory@400000 {
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device_type = "memory";
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reg = <0x400000 0x800000>;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "renesas,h8300";
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clock-frequency = <33333333>;
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};
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};
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h8intc: interrupt-controller@fffe00 {
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compatible = "renesas,h8s-intc", "renesas,h8300-intc";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xfffe00 24>;
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};
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bsc: memory-controller@fffec0 {
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compatible = "renesas,h8s-bsc", "renesas,h8300-bsc";
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reg = <0xfffec0 24>;
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};
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tpu: timer@ffffe0 {
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compatible = "renesas,tpu";
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reg = <0xffffe0 16>, <0xfffff0 12>;
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clocks = <&fclk>;
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clock-names = "fck";
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};
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timer8: timer@ffffb0 {
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compatible = "renesas,8bit-timer";
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reg = <0xffffb0 10>;
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interrupts = <72 0>;
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clocks = <&fclk>;
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clock-names = "fck";
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};
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sci0: serial@ffff78 {
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compatible = "renesas,sci";
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reg = <0xffff78 8>;
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interrupts = <88 0>, <89 0>, <90 0>, <91 0>;
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clocks = <&fclk>;
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clock-names = "fck";
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};
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sci1: serial@ffff80 {
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compatible = "renesas,sci";
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reg = <0xffff80 8>;
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interrupts = <92 0>, <93 0>, <94 0>, <95 0>;
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clocks = <&fclk>;
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clock-names = "fck";
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};
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sci2: serial@ffff88 {
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compatible = "renesas,sci";
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reg = <0xffff88 8>;
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interrupts = <96 0>, <97 0>, <98 0>, <99 0>;
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clocks = <&fclk>;
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clock-names = "fck";
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};
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};
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