mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 17:26:40 +07:00
efcf8023e2
This patch removes obsolete block operations of the simple cipher type from drivers. These were preserved so that existing users can make a smooth transition. Now that the transition is complete, they are no longer needed. Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
664 lines
18 KiB
C
664 lines
18 KiB
C
/*
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* Cryptographic API.
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*
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* Support for VIA PadLock hardware crypto engine.
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*
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* Copyright (c) 2004 Michal Ludvig <michal@logix.cz>
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*
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* Key expansion routine taken from crypto/aes.c
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* ---------------------------------------------------------------------------
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* Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
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* All rights reserved.
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*
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* LICENSE TERMS
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*
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* The free distribution and use of this software in both source and binary
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* form is allowed (with or without changes) provided that:
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*
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* 1. distributions of this source code include the above copyright
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* notice, this list of conditions and the following disclaimer;
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*
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* 2. distributions in binary form include the above copyright
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* notice, this list of conditions and the following disclaimer
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* in the documentation and/or other associated materials;
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*
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* 3. the copyright holder's name is not used to endorse products
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* built using this software without specific written permission.
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*
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* ALTERNATIVELY, provided that this notice is retained in full, this product
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* may be distributed under the terms of the GNU General Public License (GPL),
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* in which case the provisions of the GPL apply INSTEAD OF those given above.
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*
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* DISCLAIMER
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*
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* This software is provided 'as is' with no explicit or implied warranties
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* in respect of its properties, including, but not limited to, correctness
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* and/or fitness for purpose.
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* ---------------------------------------------------------------------------
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*/
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#include <crypto/algapi.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <asm/byteorder.h>
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#include "padlock.h"
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#define AES_MIN_KEY_SIZE 16 /* in uint8_t units */
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#define AES_MAX_KEY_SIZE 32 /* ditto */
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#define AES_BLOCK_SIZE 16 /* ditto */
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#define AES_EXTENDED_KEY_SIZE 64 /* in uint32_t units */
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#define AES_EXTENDED_KEY_SIZE_B (AES_EXTENDED_KEY_SIZE * sizeof(uint32_t))
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/* Control word. */
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struct cword {
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unsigned int __attribute__ ((__packed__))
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rounds:4,
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algo:3,
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keygen:1,
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interm:1,
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encdec:1,
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ksize:2;
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} __attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));
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/* Whenever making any changes to the following
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* structure *make sure* you keep E, d_data
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* and cword aligned on 16 Bytes boundaries!!! */
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struct aes_ctx {
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struct {
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struct cword encrypt;
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struct cword decrypt;
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} cword;
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u32 *D;
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int key_length;
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u32 E[AES_EXTENDED_KEY_SIZE]
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__attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));
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u32 d_data[AES_EXTENDED_KEY_SIZE]
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__attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));
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};
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/* ====== Key management routines ====== */
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static inline uint32_t
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generic_rotr32 (const uint32_t x, const unsigned bits)
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{
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const unsigned n = bits % 32;
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return (x >> n) | (x << (32 - n));
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}
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static inline uint32_t
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generic_rotl32 (const uint32_t x, const unsigned bits)
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{
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const unsigned n = bits % 32;
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return (x << n) | (x >> (32 - n));
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}
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#define rotl generic_rotl32
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#define rotr generic_rotr32
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/*
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* #define byte(x, nr) ((unsigned char)((x) >> (nr*8)))
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*/
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static inline uint8_t
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byte(const uint32_t x, const unsigned n)
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{
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return x >> (n << 3);
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}
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#define E_KEY ctx->E
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#define D_KEY ctx->D
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static uint8_t pow_tab[256];
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static uint8_t log_tab[256];
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static uint8_t sbx_tab[256];
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static uint8_t isb_tab[256];
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static uint32_t rco_tab[10];
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static uint32_t ft_tab[4][256];
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static uint32_t it_tab[4][256];
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static uint32_t fl_tab[4][256];
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static uint32_t il_tab[4][256];
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static inline uint8_t
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f_mult (uint8_t a, uint8_t b)
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{
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uint8_t aa = log_tab[a], cc = aa + log_tab[b];
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return pow_tab[cc + (cc < aa ? 1 : 0)];
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}
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#define ff_mult(a,b) (a && b ? f_mult(a, b) : 0)
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#define f_rn(bo, bi, n, k) \
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bo[n] = ft_tab[0][byte(bi[n],0)] ^ \
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ft_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
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ft_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
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ft_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
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#define i_rn(bo, bi, n, k) \
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bo[n] = it_tab[0][byte(bi[n],0)] ^ \
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it_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
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it_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
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it_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
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#define ls_box(x) \
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( fl_tab[0][byte(x, 0)] ^ \
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fl_tab[1][byte(x, 1)] ^ \
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fl_tab[2][byte(x, 2)] ^ \
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fl_tab[3][byte(x, 3)] )
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#define f_rl(bo, bi, n, k) \
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bo[n] = fl_tab[0][byte(bi[n],0)] ^ \
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fl_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
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fl_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
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fl_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
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#define i_rl(bo, bi, n, k) \
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bo[n] = il_tab[0][byte(bi[n],0)] ^ \
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il_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
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il_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
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il_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
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static void
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gen_tabs (void)
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{
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uint32_t i, t;
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uint8_t p, q;
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/* log and power tables for GF(2**8) finite field with
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0x011b as modular polynomial - the simplest prmitive
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root is 0x03, used here to generate the tables */
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for (i = 0, p = 1; i < 256; ++i) {
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pow_tab[i] = (uint8_t) p;
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log_tab[p] = (uint8_t) i;
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p ^= (p << 1) ^ (p & 0x80 ? 0x01b : 0);
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}
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log_tab[1] = 0;
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for (i = 0, p = 1; i < 10; ++i) {
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rco_tab[i] = p;
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p = (p << 1) ^ (p & 0x80 ? 0x01b : 0);
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}
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for (i = 0; i < 256; ++i) {
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p = (i ? pow_tab[255 - log_tab[i]] : 0);
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q = ((p >> 7) | (p << 1)) ^ ((p >> 6) | (p << 2));
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p ^= 0x63 ^ q ^ ((q >> 6) | (q << 2));
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sbx_tab[i] = p;
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isb_tab[p] = (uint8_t) i;
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}
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for (i = 0; i < 256; ++i) {
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p = sbx_tab[i];
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t = p;
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fl_tab[0][i] = t;
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fl_tab[1][i] = rotl (t, 8);
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fl_tab[2][i] = rotl (t, 16);
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fl_tab[3][i] = rotl (t, 24);
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t = ((uint32_t) ff_mult (2, p)) |
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((uint32_t) p << 8) |
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((uint32_t) p << 16) | ((uint32_t) ff_mult (3, p) << 24);
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ft_tab[0][i] = t;
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ft_tab[1][i] = rotl (t, 8);
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ft_tab[2][i] = rotl (t, 16);
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ft_tab[3][i] = rotl (t, 24);
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p = isb_tab[i];
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t = p;
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il_tab[0][i] = t;
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il_tab[1][i] = rotl (t, 8);
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il_tab[2][i] = rotl (t, 16);
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il_tab[3][i] = rotl (t, 24);
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t = ((uint32_t) ff_mult (14, p)) |
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((uint32_t) ff_mult (9, p) << 8) |
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((uint32_t) ff_mult (13, p) << 16) |
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((uint32_t) ff_mult (11, p) << 24);
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it_tab[0][i] = t;
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it_tab[1][i] = rotl (t, 8);
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it_tab[2][i] = rotl (t, 16);
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it_tab[3][i] = rotl (t, 24);
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}
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}
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#define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b)
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#define imix_col(y,x) \
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u = star_x(x); \
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v = star_x(u); \
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w = star_x(v); \
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t = w ^ (x); \
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(y) = u ^ v ^ w; \
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(y) ^= rotr(u ^ t, 8) ^ \
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rotr(v ^ t, 16) ^ \
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rotr(t,24)
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/* initialise the key schedule from the user supplied key */
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#define loop4(i) \
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{ t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
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t ^= E_KEY[4 * i]; E_KEY[4 * i + 4] = t; \
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t ^= E_KEY[4 * i + 1]; E_KEY[4 * i + 5] = t; \
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t ^= E_KEY[4 * i + 2]; E_KEY[4 * i + 6] = t; \
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t ^= E_KEY[4 * i + 3]; E_KEY[4 * i + 7] = t; \
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}
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#define loop6(i) \
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{ t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
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t ^= E_KEY[6 * i]; E_KEY[6 * i + 6] = t; \
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t ^= E_KEY[6 * i + 1]; E_KEY[6 * i + 7] = t; \
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t ^= E_KEY[6 * i + 2]; E_KEY[6 * i + 8] = t; \
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t ^= E_KEY[6 * i + 3]; E_KEY[6 * i + 9] = t; \
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t ^= E_KEY[6 * i + 4]; E_KEY[6 * i + 10] = t; \
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t ^= E_KEY[6 * i + 5]; E_KEY[6 * i + 11] = t; \
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}
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#define loop8(i) \
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{ t = rotr(t, 8); ; t = ls_box(t) ^ rco_tab[i]; \
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t ^= E_KEY[8 * i]; E_KEY[8 * i + 8] = t; \
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t ^= E_KEY[8 * i + 1]; E_KEY[8 * i + 9] = t; \
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t ^= E_KEY[8 * i + 2]; E_KEY[8 * i + 10] = t; \
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t ^= E_KEY[8 * i + 3]; E_KEY[8 * i + 11] = t; \
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t = E_KEY[8 * i + 4] ^ ls_box(t); \
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E_KEY[8 * i + 12] = t; \
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t ^= E_KEY[8 * i + 5]; E_KEY[8 * i + 13] = t; \
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t ^= E_KEY[8 * i + 6]; E_KEY[8 * i + 14] = t; \
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t ^= E_KEY[8 * i + 7]; E_KEY[8 * i + 15] = t; \
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}
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/* Tells whether the ACE is capable to generate
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the extended key for a given key_len. */
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static inline int
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aes_hw_extkey_available(uint8_t key_len)
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{
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/* TODO: We should check the actual CPU model/stepping
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as it's possible that the capability will be
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added in the next CPU revisions. */
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if (key_len == 16)
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return 1;
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return 0;
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}
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static inline struct aes_ctx *aes_ctx_common(void *ctx)
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{
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unsigned long addr = (unsigned long)ctx;
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unsigned long align = PADLOCK_ALIGNMENT;
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if (align <= crypto_tfm_ctx_alignment())
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align = 1;
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return (struct aes_ctx *)ALIGN(addr, align);
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}
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static inline struct aes_ctx *aes_ctx(struct crypto_tfm *tfm)
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{
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return aes_ctx_common(crypto_tfm_ctx(tfm));
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}
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static inline struct aes_ctx *blk_aes_ctx(struct crypto_blkcipher *tfm)
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{
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return aes_ctx_common(crypto_blkcipher_ctx(tfm));
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}
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static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
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unsigned int key_len)
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{
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struct aes_ctx *ctx = aes_ctx(tfm);
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const __le32 *key = (const __le32 *)in_key;
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u32 *flags = &tfm->crt_flags;
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uint32_t i, t, u, v, w;
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uint32_t P[AES_EXTENDED_KEY_SIZE];
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uint32_t rounds;
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if (key_len % 8) {
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*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
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return -EINVAL;
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}
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ctx->key_length = key_len;
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/*
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* If the hardware is capable of generating the extended key
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* itself we must supply the plain key for both encryption
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* and decryption.
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*/
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ctx->D = ctx->E;
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E_KEY[0] = le32_to_cpu(key[0]);
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E_KEY[1] = le32_to_cpu(key[1]);
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E_KEY[2] = le32_to_cpu(key[2]);
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E_KEY[3] = le32_to_cpu(key[3]);
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/* Prepare control words. */
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memset(&ctx->cword, 0, sizeof(ctx->cword));
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ctx->cword.decrypt.encdec = 1;
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ctx->cword.encrypt.rounds = 10 + (key_len - 16) / 4;
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ctx->cword.decrypt.rounds = ctx->cword.encrypt.rounds;
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ctx->cword.encrypt.ksize = (key_len - 16) / 8;
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ctx->cword.decrypt.ksize = ctx->cword.encrypt.ksize;
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/* Don't generate extended keys if the hardware can do it. */
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if (aes_hw_extkey_available(key_len))
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return 0;
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ctx->D = ctx->d_data;
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ctx->cword.encrypt.keygen = 1;
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ctx->cword.decrypt.keygen = 1;
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switch (key_len) {
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case 16:
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t = E_KEY[3];
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for (i = 0; i < 10; ++i)
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loop4 (i);
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break;
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case 24:
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E_KEY[4] = le32_to_cpu(key[4]);
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t = E_KEY[5] = le32_to_cpu(key[5]);
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for (i = 0; i < 8; ++i)
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loop6 (i);
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break;
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case 32:
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E_KEY[4] = le32_to_cpu(key[4]);
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E_KEY[5] = le32_to_cpu(key[5]);
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E_KEY[6] = le32_to_cpu(key[6]);
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t = E_KEY[7] = le32_to_cpu(key[7]);
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for (i = 0; i < 7; ++i)
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loop8 (i);
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break;
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}
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D_KEY[0] = E_KEY[0];
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D_KEY[1] = E_KEY[1];
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D_KEY[2] = E_KEY[2];
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D_KEY[3] = E_KEY[3];
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for (i = 4; i < key_len + 24; ++i) {
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imix_col (D_KEY[i], E_KEY[i]);
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}
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/* PadLock needs a different format of the decryption key. */
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rounds = 10 + (key_len - 16) / 4;
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for (i = 0; i < rounds; i++) {
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P[((i + 1) * 4) + 0] = D_KEY[((rounds - i - 1) * 4) + 0];
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P[((i + 1) * 4) + 1] = D_KEY[((rounds - i - 1) * 4) + 1];
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P[((i + 1) * 4) + 2] = D_KEY[((rounds - i - 1) * 4) + 2];
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P[((i + 1) * 4) + 3] = D_KEY[((rounds - i - 1) * 4) + 3];
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}
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P[0] = E_KEY[(rounds * 4) + 0];
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P[1] = E_KEY[(rounds * 4) + 1];
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P[2] = E_KEY[(rounds * 4) + 2];
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P[3] = E_KEY[(rounds * 4) + 3];
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memcpy(D_KEY, P, AES_EXTENDED_KEY_SIZE_B);
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return 0;
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}
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/* ====== Encryption/decryption routines ====== */
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/* These are the real call to PadLock. */
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static inline void padlock_xcrypt_ecb(const u8 *input, u8 *output, void *key,
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void *control_word, u32 count)
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{
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asm volatile ("pushfl; popfl"); /* enforce key reload. */
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asm volatile (".byte 0xf3,0x0f,0xa7,0xc8" /* rep xcryptecb */
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: "+S"(input), "+D"(output)
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: "d"(control_word), "b"(key), "c"(count));
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}
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static inline u8 *padlock_xcrypt_cbc(const u8 *input, u8 *output, void *key,
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u8 *iv, void *control_word, u32 count)
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{
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/* Enforce key reload. */
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asm volatile ("pushfl; popfl");
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/* rep xcryptcbc */
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asm volatile (".byte 0xf3,0x0f,0xa7,0xd0"
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: "+S" (input), "+D" (output), "+a" (iv)
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: "d" (control_word), "b" (key), "c" (count));
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return iv;
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}
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static void aes_encrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
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{
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struct aes_ctx *ctx = aes_ctx(tfm);
|
|
padlock_xcrypt_ecb(in, out, ctx->E, &ctx->cword.encrypt, 1);
|
|
}
|
|
|
|
static void aes_decrypt(struct crypto_tfm *tfm, u8 *out, const u8 *in)
|
|
{
|
|
struct aes_ctx *ctx = aes_ctx(tfm);
|
|
padlock_xcrypt_ecb(in, out, ctx->D, &ctx->cword.decrypt, 1);
|
|
}
|
|
|
|
static struct crypto_alg aes_alg = {
|
|
.cra_name = "aes",
|
|
.cra_driver_name = "aes-padlock",
|
|
.cra_priority = PADLOCK_CRA_PRIORITY,
|
|
.cra_flags = CRYPTO_ALG_TYPE_CIPHER,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct aes_ctx),
|
|
.cra_alignmask = PADLOCK_ALIGNMENT - 1,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_list = LIST_HEAD_INIT(aes_alg.cra_list),
|
|
.cra_u = {
|
|
.cipher = {
|
|
.cia_min_keysize = AES_MIN_KEY_SIZE,
|
|
.cia_max_keysize = AES_MAX_KEY_SIZE,
|
|
.cia_setkey = aes_set_key,
|
|
.cia_encrypt = aes_encrypt,
|
|
.cia_decrypt = aes_decrypt,
|
|
}
|
|
}
|
|
};
|
|
|
|
static int ecb_aes_encrypt(struct blkcipher_desc *desc,
|
|
struct scatterlist *dst, struct scatterlist *src,
|
|
unsigned int nbytes)
|
|
{
|
|
struct aes_ctx *ctx = blk_aes_ctx(desc->tfm);
|
|
struct blkcipher_walk walk;
|
|
int err;
|
|
|
|
blkcipher_walk_init(&walk, dst, src, nbytes);
|
|
err = blkcipher_walk_virt(desc, &walk);
|
|
|
|
while ((nbytes = walk.nbytes)) {
|
|
padlock_xcrypt_ecb(walk.src.virt.addr, walk.dst.virt.addr,
|
|
ctx->E, &ctx->cword.encrypt,
|
|
nbytes / AES_BLOCK_SIZE);
|
|
nbytes &= AES_BLOCK_SIZE - 1;
|
|
err = blkcipher_walk_done(desc, &walk, nbytes);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static int ecb_aes_decrypt(struct blkcipher_desc *desc,
|
|
struct scatterlist *dst, struct scatterlist *src,
|
|
unsigned int nbytes)
|
|
{
|
|
struct aes_ctx *ctx = blk_aes_ctx(desc->tfm);
|
|
struct blkcipher_walk walk;
|
|
int err;
|
|
|
|
blkcipher_walk_init(&walk, dst, src, nbytes);
|
|
err = blkcipher_walk_virt(desc, &walk);
|
|
|
|
while ((nbytes = walk.nbytes)) {
|
|
padlock_xcrypt_ecb(walk.src.virt.addr, walk.dst.virt.addr,
|
|
ctx->D, &ctx->cword.decrypt,
|
|
nbytes / AES_BLOCK_SIZE);
|
|
nbytes &= AES_BLOCK_SIZE - 1;
|
|
err = blkcipher_walk_done(desc, &walk, nbytes);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static struct crypto_alg ecb_aes_alg = {
|
|
.cra_name = "ecb(aes)",
|
|
.cra_driver_name = "ecb-aes-padlock",
|
|
.cra_priority = PADLOCK_COMPOSITE_PRIORITY,
|
|
.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct aes_ctx),
|
|
.cra_alignmask = PADLOCK_ALIGNMENT - 1,
|
|
.cra_type = &crypto_blkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_list = LIST_HEAD_INIT(ecb_aes_alg.cra_list),
|
|
.cra_u = {
|
|
.blkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
.setkey = aes_set_key,
|
|
.encrypt = ecb_aes_encrypt,
|
|
.decrypt = ecb_aes_decrypt,
|
|
}
|
|
}
|
|
};
|
|
|
|
static int cbc_aes_encrypt(struct blkcipher_desc *desc,
|
|
struct scatterlist *dst, struct scatterlist *src,
|
|
unsigned int nbytes)
|
|
{
|
|
struct aes_ctx *ctx = blk_aes_ctx(desc->tfm);
|
|
struct blkcipher_walk walk;
|
|
int err;
|
|
|
|
blkcipher_walk_init(&walk, dst, src, nbytes);
|
|
err = blkcipher_walk_virt(desc, &walk);
|
|
|
|
while ((nbytes = walk.nbytes)) {
|
|
u8 *iv = padlock_xcrypt_cbc(walk.src.virt.addr,
|
|
walk.dst.virt.addr, ctx->E,
|
|
walk.iv, &ctx->cword.encrypt,
|
|
nbytes / AES_BLOCK_SIZE);
|
|
memcpy(walk.iv, iv, AES_BLOCK_SIZE);
|
|
nbytes &= AES_BLOCK_SIZE - 1;
|
|
err = blkcipher_walk_done(desc, &walk, nbytes);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static int cbc_aes_decrypt(struct blkcipher_desc *desc,
|
|
struct scatterlist *dst, struct scatterlist *src,
|
|
unsigned int nbytes)
|
|
{
|
|
struct aes_ctx *ctx = blk_aes_ctx(desc->tfm);
|
|
struct blkcipher_walk walk;
|
|
int err;
|
|
|
|
blkcipher_walk_init(&walk, dst, src, nbytes);
|
|
err = blkcipher_walk_virt(desc, &walk);
|
|
|
|
while ((nbytes = walk.nbytes)) {
|
|
padlock_xcrypt_cbc(walk.src.virt.addr, walk.dst.virt.addr,
|
|
ctx->D, walk.iv, &ctx->cword.decrypt,
|
|
nbytes / AES_BLOCK_SIZE);
|
|
nbytes &= AES_BLOCK_SIZE - 1;
|
|
err = blkcipher_walk_done(desc, &walk, nbytes);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static struct crypto_alg cbc_aes_alg = {
|
|
.cra_name = "cbc(aes)",
|
|
.cra_driver_name = "cbc-aes-padlock",
|
|
.cra_priority = PADLOCK_COMPOSITE_PRIORITY,
|
|
.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct aes_ctx),
|
|
.cra_alignmask = PADLOCK_ALIGNMENT - 1,
|
|
.cra_type = &crypto_blkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_list = LIST_HEAD_INIT(cbc_aes_alg.cra_list),
|
|
.cra_u = {
|
|
.blkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = aes_set_key,
|
|
.encrypt = cbc_aes_encrypt,
|
|
.decrypt = cbc_aes_decrypt,
|
|
}
|
|
}
|
|
};
|
|
|
|
static int __init padlock_init(void)
|
|
{
|
|
int ret;
|
|
|
|
if (!cpu_has_xcrypt) {
|
|
printk(KERN_ERR PFX "VIA PadLock not detected.\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (!cpu_has_xcrypt_enabled) {
|
|
printk(KERN_ERR PFX "VIA PadLock detected, but not enabled. Hmm, strange...\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
gen_tabs();
|
|
if ((ret = crypto_register_alg(&aes_alg)))
|
|
goto aes_err;
|
|
|
|
if ((ret = crypto_register_alg(&ecb_aes_alg)))
|
|
goto ecb_aes_err;
|
|
|
|
if ((ret = crypto_register_alg(&cbc_aes_alg)))
|
|
goto cbc_aes_err;
|
|
|
|
printk(KERN_NOTICE PFX "Using VIA PadLock ACE for AES algorithm.\n");
|
|
|
|
out:
|
|
return ret;
|
|
|
|
cbc_aes_err:
|
|
crypto_unregister_alg(&ecb_aes_alg);
|
|
ecb_aes_err:
|
|
crypto_unregister_alg(&aes_alg);
|
|
aes_err:
|
|
printk(KERN_ERR PFX "VIA PadLock AES initialization failed.\n");
|
|
goto out;
|
|
}
|
|
|
|
static void __exit padlock_fini(void)
|
|
{
|
|
crypto_unregister_alg(&cbc_aes_alg);
|
|
crypto_unregister_alg(&ecb_aes_alg);
|
|
crypto_unregister_alg(&aes_alg);
|
|
}
|
|
|
|
module_init(padlock_init);
|
|
module_exit(padlock_fini);
|
|
|
|
MODULE_DESCRIPTION("VIA PadLock AES algorithm support");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Michal Ludvig");
|
|
|
|
MODULE_ALIAS("aes-padlock");
|