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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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27ec937c4f
Fix this sparse warnings: drivers/video/neofb.c:1456:4: warning: returning void-valued expression drivers/video/neofb.c:1464:3: warning: returning void-valued expression Signed-off-by: Hannes Eder <hannes@hanneseder.net> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2256 lines
55 KiB
C
2256 lines
55 KiB
C
/*
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* linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
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*
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* Copyright (c) 2001-2002 Denis Oliver Kropp <dok@directfb.org>
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*
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*
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* Card specific code is based on XFree86's neomagic driver.
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* Framebuffer framework code is based on code of cyber2000fb.
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*
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* This file is subject to the terms and conditions of the GNU General
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* Public License. See the file COPYING in the main directory of this
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* archive for more details.
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*
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*
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* 0.4.1
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* - Cosmetic changes (dok)
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*
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* 0.4
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* - Toshiba Libretto support, allow modes larger than LCD size if
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* LCD is disabled, keep BIOS settings if internal/external display
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* haven't been enabled explicitly
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* (Thomas J. Moore <dark@mama.indstate.edu>)
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*
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* 0.3.3
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* - Porting over to new fbdev api. (jsimmons)
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*
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* 0.3.2
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* - got rid of all floating point (dok)
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*
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* 0.3.1
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* - added module license (dok)
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*
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* 0.3
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* - hardware accelerated clear and move for 2200 and above (dok)
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* - maximum allowed dotclock is handled now (dok)
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*
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* 0.2.1
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* - correct panning after X usage (dok)
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* - added module and kernel parameters (dok)
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* - no stretching if external display is enabled (dok)
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*
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* 0.2
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* - initial version (dok)
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*
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*
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* TODO
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* - ioctl for internal/external switching
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* - blanking
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* - 32bit depth support, maybe impossible
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* - disable pan-on-sync, need specs
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*
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* BUGS
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* - white margin on bootup like with tdfxfb (colormap problem?)
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/fb.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#ifdef CONFIG_TOSHIBA
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#include <linux/toshiba.h>
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#endif
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/pgtable.h>
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#include <asm/system.h>
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#ifdef CONFIG_MTRR
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#include <asm/mtrr.h>
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#endif
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#include <video/vga.h>
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#include <video/neomagic.h>
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#define NEOFB_VERSION "0.4.2"
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/* --------------------------------------------------------------------- */
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static int internal;
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static int external;
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static int libretto;
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static int nostretch;
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static int nopciburst;
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static char *mode_option __devinitdata = NULL;
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#ifdef MODULE
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MODULE_AUTHOR("(c) 2001-2002 Denis Oliver Kropp <dok@convergence.de>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
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module_param(internal, bool, 0);
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MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
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module_param(external, bool, 0);
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MODULE_PARM_DESC(external, "Enable output on external CRT.");
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module_param(libretto, bool, 0);
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MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
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module_param(nostretch, bool, 0);
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MODULE_PARM_DESC(nostretch,
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"Disable stretching of modes smaller than LCD.");
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module_param(nopciburst, bool, 0);
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MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
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module_param(mode_option, charp, 0);
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MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
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#endif
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/* --------------------------------------------------------------------- */
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static biosMode bios8[] = {
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{320, 240, 0x40},
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{300, 400, 0x42},
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{640, 400, 0x20},
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{640, 480, 0x21},
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{800, 600, 0x23},
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{1024, 768, 0x25},
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};
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static biosMode bios16[] = {
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{320, 200, 0x2e},
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{320, 240, 0x41},
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{300, 400, 0x43},
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{640, 480, 0x31},
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{800, 600, 0x34},
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{1024, 768, 0x37},
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};
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static biosMode bios24[] = {
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{640, 480, 0x32},
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{800, 600, 0x35},
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{1024, 768, 0x38}
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};
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#ifdef NO_32BIT_SUPPORT_YET
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/* FIXME: guessed values, wrong */
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static biosMode bios32[] = {
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{640, 480, 0x33},
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{800, 600, 0x36},
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{1024, 768, 0x39}
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};
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#endif
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static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
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{
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writel(val, par->neo2200 + par->cursorOff + regindex);
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}
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static int neoFindMode(int xres, int yres, int depth)
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{
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int xres_s;
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int i, size;
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biosMode *mode;
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switch (depth) {
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case 8:
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size = ARRAY_SIZE(bios8);
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mode = bios8;
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break;
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case 16:
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size = ARRAY_SIZE(bios16);
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mode = bios16;
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break;
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case 24:
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size = ARRAY_SIZE(bios24);
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mode = bios24;
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break;
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#ifdef NO_32BIT_SUPPORT_YET
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case 32:
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size = ARRAY_SIZE(bios32);
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mode = bios32;
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break;
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#endif
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default:
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return 0;
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}
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for (i = 0; i < size; i++) {
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if (xres <= mode[i].x_res) {
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xres_s = mode[i].x_res;
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for (; i < size; i++) {
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if (mode[i].x_res != xres_s)
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return mode[i - 1].mode;
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if (yres <= mode[i].y_res)
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return mode[i].mode;
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}
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}
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}
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return mode[size - 1].mode;
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}
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/*
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* neoCalcVCLK --
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*
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* Determine the closest clock frequency to the one requested.
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*/
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#define MAX_N 127
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#define MAX_D 31
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#define MAX_F 1
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static void neoCalcVCLK(const struct fb_info *info,
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struct neofb_par *par, long freq)
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{
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int n, d, f;
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int n_best = 0, d_best = 0, f_best = 0;
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long f_best_diff = 0x7ffff;
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for (f = 0; f <= MAX_F; f++)
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for (d = 0; d <= MAX_D; d++)
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for (n = 0; n <= MAX_N; n++) {
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long f_out;
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long f_diff;
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f_out = ((14318 * (n + 1)) / (d + 1)) >> f;
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f_diff = abs(f_out - freq);
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if (f_diff <= f_best_diff) {
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f_best_diff = f_diff;
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n_best = n;
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d_best = d;
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f_best = f;
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}
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if (f_out > freq)
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break;
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}
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if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
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info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
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info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
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info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
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/* NOT_DONE: We are trying the full range of the 2200 clock.
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We should be able to try n up to 2047 */
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par->VCLK3NumeratorLow = n_best;
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par->VCLK3NumeratorHigh = (f_best << 7);
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} else
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par->VCLK3NumeratorLow = n_best | (f_best << 7);
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par->VCLK3Denominator = d_best;
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#ifdef NEOFB_DEBUG
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printk(KERN_DEBUG "neoVCLK: f:%ld NumLow=%d NumHi=%d Den=%d Df=%ld\n",
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freq,
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par->VCLK3NumeratorLow,
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par->VCLK3NumeratorHigh,
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par->VCLK3Denominator, f_best_diff);
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#endif
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}
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/*
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* vgaHWInit --
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* Handle the initialization, etc. of a screen.
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* Return FALSE on failure.
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*/
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static int vgaHWInit(const struct fb_var_screeninfo *var,
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struct neofb_par *par)
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{
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int hsync_end = var->xres + var->right_margin + var->hsync_len;
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int htotal = (hsync_end + var->left_margin) >> 3;
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int vsync_start = var->yres + var->lower_margin;
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int vsync_end = vsync_start + var->vsync_len;
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int vtotal = vsync_end + var->upper_margin;
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par->MiscOutReg = 0x23;
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if (!(var->sync & FB_SYNC_HOR_HIGH_ACT))
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par->MiscOutReg |= 0x40;
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if (!(var->sync & FB_SYNC_VERT_HIGH_ACT))
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par->MiscOutReg |= 0x80;
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/*
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* Time Sequencer
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*/
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par->Sequencer[0] = 0x00;
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par->Sequencer[1] = 0x01;
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par->Sequencer[2] = 0x0F;
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par->Sequencer[3] = 0x00; /* Font select */
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par->Sequencer[4] = 0x0E; /* Misc */
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/*
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* CRTC Controller
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*/
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par->CRTC[0] = htotal - 5;
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par->CRTC[1] = (var->xres >> 3) - 1;
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par->CRTC[2] = (var->xres >> 3) - 1;
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par->CRTC[3] = ((htotal - 1) & 0x1F) | 0x80;
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par->CRTC[4] = ((var->xres + var->right_margin) >> 3);
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par->CRTC[5] = (((htotal - 1) & 0x20) << 2)
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| (((hsync_end >> 3)) & 0x1F);
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par->CRTC[6] = (vtotal - 2) & 0xFF;
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par->CRTC[7] = (((vtotal - 2) & 0x100) >> 8)
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| (((var->yres - 1) & 0x100) >> 7)
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| ((vsync_start & 0x100) >> 6)
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| (((var->yres - 1) & 0x100) >> 5)
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| 0x10 | (((vtotal - 2) & 0x200) >> 4)
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| (((var->yres - 1) & 0x200) >> 3)
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| ((vsync_start & 0x200) >> 2);
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par->CRTC[8] = 0x00;
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par->CRTC[9] = (((var->yres - 1) & 0x200) >> 4) | 0x40;
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if (var->vmode & FB_VMODE_DOUBLE)
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par->CRTC[9] |= 0x80;
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par->CRTC[10] = 0x00;
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par->CRTC[11] = 0x00;
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par->CRTC[12] = 0x00;
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par->CRTC[13] = 0x00;
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par->CRTC[14] = 0x00;
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par->CRTC[15] = 0x00;
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par->CRTC[16] = vsync_start & 0xFF;
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par->CRTC[17] = (vsync_end & 0x0F) | 0x20;
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par->CRTC[18] = (var->yres - 1) & 0xFF;
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par->CRTC[19] = var->xres_virtual >> 4;
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par->CRTC[20] = 0x00;
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par->CRTC[21] = (var->yres - 1) & 0xFF;
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par->CRTC[22] = (vtotal - 1) & 0xFF;
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par->CRTC[23] = 0xC3;
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par->CRTC[24] = 0xFF;
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/*
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* are these unnecessary?
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* vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
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* vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
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*/
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/*
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* Graphics Display Controller
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*/
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par->Graphics[0] = 0x00;
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par->Graphics[1] = 0x00;
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par->Graphics[2] = 0x00;
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par->Graphics[3] = 0x00;
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par->Graphics[4] = 0x00;
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par->Graphics[5] = 0x40;
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par->Graphics[6] = 0x05; /* only map 64k VGA memory !!!! */
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par->Graphics[7] = 0x0F;
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par->Graphics[8] = 0xFF;
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par->Attribute[0] = 0x00; /* standard colormap translation */
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par->Attribute[1] = 0x01;
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par->Attribute[2] = 0x02;
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par->Attribute[3] = 0x03;
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par->Attribute[4] = 0x04;
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par->Attribute[5] = 0x05;
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par->Attribute[6] = 0x06;
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par->Attribute[7] = 0x07;
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par->Attribute[8] = 0x08;
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par->Attribute[9] = 0x09;
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par->Attribute[10] = 0x0A;
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par->Attribute[11] = 0x0B;
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par->Attribute[12] = 0x0C;
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par->Attribute[13] = 0x0D;
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par->Attribute[14] = 0x0E;
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par->Attribute[15] = 0x0F;
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par->Attribute[16] = 0x41;
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par->Attribute[17] = 0xFF;
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par->Attribute[18] = 0x0F;
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par->Attribute[19] = 0x00;
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par->Attribute[20] = 0x00;
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return 0;
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}
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static void vgaHWLock(struct vgastate *state)
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{
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/* Protect CRTC[0-7] */
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vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
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}
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static void vgaHWUnlock(void)
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{
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/* Unprotect CRTC[0-7] */
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vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
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}
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static void neoLock(struct vgastate *state)
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{
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vga_wgfx(state->vgabase, 0x09, 0x00);
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vgaHWLock(state);
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}
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static void neoUnlock(void)
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{
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vgaHWUnlock();
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vga_wgfx(NULL, 0x09, 0x26);
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}
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/*
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* VGA Palette management
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*/
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static int paletteEnabled = 0;
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static inline void VGAenablePalette(void)
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{
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vga_r(NULL, VGA_IS1_RC);
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vga_w(NULL, VGA_ATT_W, 0x00);
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paletteEnabled = 1;
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}
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static inline void VGAdisablePalette(void)
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{
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vga_r(NULL, VGA_IS1_RC);
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vga_w(NULL, VGA_ATT_W, 0x20);
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paletteEnabled = 0;
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}
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static inline void VGAwATTR(u8 index, u8 value)
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{
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if (paletteEnabled)
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index &= ~0x20;
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else
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index |= 0x20;
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vga_r(NULL, VGA_IS1_RC);
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vga_wattr(NULL, index, value);
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}
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static void vgaHWProtect(int on)
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{
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unsigned char tmp;
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tmp = vga_rseq(NULL, 0x01);
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if (on) {
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/*
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* Turn off screen and disable sequencer.
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*/
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vga_wseq(NULL, 0x00, 0x01); /* Synchronous Reset */
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vga_wseq(NULL, 0x01, tmp | 0x20); /* disable the display */
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VGAenablePalette();
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} else {
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/*
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* Reenable sequencer, then turn on screen.
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*/
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vga_wseq(NULL, 0x01, tmp & ~0x20); /* reenable display */
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vga_wseq(NULL, 0x00, 0x03); /* clear synchronousreset */
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VGAdisablePalette();
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}
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}
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static void vgaHWRestore(const struct fb_info *info,
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const struct neofb_par *par)
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{
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int i;
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vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
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for (i = 1; i < 5; i++)
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vga_wseq(NULL, i, par->Sequencer[i]);
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/* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
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vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
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for (i = 0; i < 25; i++)
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vga_wcrt(NULL, i, par->CRTC[i]);
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for (i = 0; i < 9; i++)
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vga_wgfx(NULL, i, par->Graphics[i]);
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VGAenablePalette();
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for (i = 0; i < 21; i++)
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VGAwATTR(i, par->Attribute[i]);
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VGAdisablePalette();
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}
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|
|
|
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/* -------------------- Hardware specific routines ------------------------- */
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/*
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* Hardware Acceleration for Neo2200+
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*/
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static inline int neo2200_sync(struct fb_info *info)
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{
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struct neofb_par *par = info->par;
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while (readl(&par->neo2200->bltStat) & 1)
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cpu_relax();
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return 0;
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}
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|
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static inline void neo2200_wait_fifo(struct fb_info *info,
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int requested_fifo_space)
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{
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// ndev->neo.waitfifo_calls++;
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// ndev->neo.waitfifo_sum += requested_fifo_space;
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|
|
/* FIXME: does not work
|
|
if (neo_fifo_space < requested_fifo_space)
|
|
{
|
|
neo_fifo_waitcycles++;
|
|
|
|
while (1)
|
|
{
|
|
neo_fifo_space = (neo2200->bltStat >> 8);
|
|
if (neo_fifo_space >= requested_fifo_space)
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
neo_fifo_cache_hits++;
|
|
}
|
|
|
|
neo_fifo_space -= requested_fifo_space;
|
|
*/
|
|
|
|
neo2200_sync(info);
|
|
}
|
|
|
|
static inline void neo2200_accel_init(struct fb_info *info,
|
|
struct fb_var_screeninfo *var)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
Neo2200 __iomem *neo2200 = par->neo2200;
|
|
u32 bltMod, pitch;
|
|
|
|
neo2200_sync(info);
|
|
|
|
switch (var->bits_per_pixel) {
|
|
case 8:
|
|
bltMod = NEO_MODE1_DEPTH8;
|
|
pitch = var->xres_virtual;
|
|
break;
|
|
case 15:
|
|
case 16:
|
|
bltMod = NEO_MODE1_DEPTH16;
|
|
pitch = var->xres_virtual * 2;
|
|
break;
|
|
case 24:
|
|
bltMod = NEO_MODE1_DEPTH24;
|
|
pitch = var->xres_virtual * 3;
|
|
break;
|
|
default:
|
|
printk(KERN_ERR
|
|
"neofb: neo2200_accel_init: unexpected bits per pixel!\n");
|
|
return;
|
|
}
|
|
|
|
writel(bltMod << 16, &neo2200->bltStat);
|
|
writel((pitch << 16) | pitch, &neo2200->pitch);
|
|
}
|
|
|
|
/* --------------------------------------------------------------------- */
|
|
|
|
static int
|
|
neofb_open(struct fb_info *info, int user)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
|
|
if (!par->ref_count) {
|
|
memset(&par->state, 0, sizeof(struct vgastate));
|
|
par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
|
|
save_vga(&par->state);
|
|
}
|
|
par->ref_count++;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
neofb_release(struct fb_info *info, int user)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
|
|
if (!par->ref_count)
|
|
return -EINVAL;
|
|
|
|
if (par->ref_count == 1) {
|
|
restore_vga(&par->state);
|
|
}
|
|
par->ref_count--;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
int memlen, vramlen;
|
|
int mode_ok = 0;
|
|
|
|
DBG("neofb_check_var");
|
|
|
|
if (PICOS2KHZ(var->pixclock) > par->maxClock)
|
|
return -EINVAL;
|
|
|
|
/* Is the mode larger than the LCD panel? */
|
|
if (par->internal_display &&
|
|
((var->xres > par->NeoPanelWidth) ||
|
|
(var->yres > par->NeoPanelHeight))) {
|
|
printk(KERN_INFO
|
|
"Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
|
|
var->xres, var->yres, par->NeoPanelWidth,
|
|
par->NeoPanelHeight);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Is the mode one of the acceptable sizes? */
|
|
if (!par->internal_display)
|
|
mode_ok = 1;
|
|
else {
|
|
switch (var->xres) {
|
|
case 1280:
|
|
if (var->yres == 1024)
|
|
mode_ok = 1;
|
|
break;
|
|
case 1024:
|
|
if (var->yres == 768)
|
|
mode_ok = 1;
|
|
break;
|
|
case 800:
|
|
if (var->yres == (par->libretto ? 480 : 600))
|
|
mode_ok = 1;
|
|
break;
|
|
case 640:
|
|
if (var->yres == 480)
|
|
mode_ok = 1;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (!mode_ok) {
|
|
printk(KERN_INFO
|
|
"Mode (%dx%d) won't display properly on LCD\n",
|
|
var->xres, var->yres);
|
|
return -EINVAL;
|
|
}
|
|
|
|
var->red.msb_right = 0;
|
|
var->green.msb_right = 0;
|
|
var->blue.msb_right = 0;
|
|
var->transp.msb_right = 0;
|
|
|
|
var->transp.offset = 0;
|
|
var->transp.length = 0;
|
|
switch (var->bits_per_pixel) {
|
|
case 8: /* PSEUDOCOLOUR, 256 */
|
|
var->red.offset = 0;
|
|
var->red.length = 8;
|
|
var->green.offset = 0;
|
|
var->green.length = 8;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 8;
|
|
break;
|
|
|
|
case 16: /* DIRECTCOLOUR, 64k */
|
|
var->red.offset = 11;
|
|
var->red.length = 5;
|
|
var->green.offset = 5;
|
|
var->green.length = 6;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 5;
|
|
break;
|
|
|
|
case 24: /* TRUECOLOUR, 16m */
|
|
var->red.offset = 16;
|
|
var->red.length = 8;
|
|
var->green.offset = 8;
|
|
var->green.length = 8;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 8;
|
|
break;
|
|
|
|
#ifdef NO_32BIT_SUPPORT_YET
|
|
case 32: /* TRUECOLOUR, 16m */
|
|
var->transp.offset = 24;
|
|
var->transp.length = 8;
|
|
var->red.offset = 16;
|
|
var->red.length = 8;
|
|
var->green.offset = 8;
|
|
var->green.length = 8;
|
|
var->blue.offset = 0;
|
|
var->blue.length = 8;
|
|
break;
|
|
#endif
|
|
default:
|
|
printk(KERN_WARNING "neofb: no support for %dbpp\n",
|
|
var->bits_per_pixel);
|
|
return -EINVAL;
|
|
}
|
|
|
|
vramlen = info->fix.smem_len;
|
|
if (vramlen > 4 * 1024 * 1024)
|
|
vramlen = 4 * 1024 * 1024;
|
|
|
|
if (var->xres_virtual < var->xres)
|
|
var->xres_virtual = var->xres;
|
|
|
|
memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
|
|
|
|
if (memlen > vramlen) {
|
|
var->yres_virtual = vramlen * 8 / (var->xres_virtual *
|
|
var->bits_per_pixel);
|
|
memlen = var->xres_virtual * var->bits_per_pixel *
|
|
var->yres_virtual / 8;
|
|
}
|
|
|
|
/* we must round yres/xres down, we already rounded y/xres_virtual up
|
|
if it was possible. We should return -EINVAL, but I disagree */
|
|
if (var->yres_virtual < var->yres)
|
|
var->yres = var->yres_virtual;
|
|
if (var->xoffset + var->xres > var->xres_virtual)
|
|
var->xoffset = var->xres_virtual - var->xres;
|
|
if (var->yoffset + var->yres > var->yres_virtual)
|
|
var->yoffset = var->yres_virtual - var->yres;
|
|
|
|
var->nonstd = 0;
|
|
var->height = -1;
|
|
var->width = -1;
|
|
|
|
if (var->bits_per_pixel >= 24 || !par->neo2200)
|
|
var->accel_flags &= ~FB_ACCELF_TEXT;
|
|
return 0;
|
|
}
|
|
|
|
static int neofb_set_par(struct fb_info *info)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
unsigned char temp;
|
|
int i, clock_hi = 0;
|
|
int lcd_stretch;
|
|
int hoffset, voffset;
|
|
int vsync_start, vtotal;
|
|
|
|
DBG("neofb_set_par");
|
|
|
|
neoUnlock();
|
|
|
|
vgaHWProtect(1); /* Blank the screen */
|
|
|
|
vsync_start = info->var.yres + info->var.lower_margin;
|
|
vtotal = vsync_start + info->var.vsync_len + info->var.upper_margin;
|
|
|
|
/*
|
|
* This will allocate the datastructure and initialize all of the
|
|
* generic VGA registers.
|
|
*/
|
|
|
|
if (vgaHWInit(&info->var, par))
|
|
return -EINVAL;
|
|
|
|
/*
|
|
* The default value assigned by vgaHW.c is 0x41, but this does
|
|
* not work for NeoMagic.
|
|
*/
|
|
par->Attribute[16] = 0x01;
|
|
|
|
switch (info->var.bits_per_pixel) {
|
|
case 8:
|
|
par->CRTC[0x13] = info->var.xres_virtual >> 3;
|
|
par->ExtCRTOffset = info->var.xres_virtual >> 11;
|
|
par->ExtColorModeSelect = 0x11;
|
|
break;
|
|
case 16:
|
|
par->CRTC[0x13] = info->var.xres_virtual >> 2;
|
|
par->ExtCRTOffset = info->var.xres_virtual >> 10;
|
|
par->ExtColorModeSelect = 0x13;
|
|
break;
|
|
case 24:
|
|
par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
|
|
par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
|
|
par->ExtColorModeSelect = 0x14;
|
|
break;
|
|
#ifdef NO_32BIT_SUPPORT_YET
|
|
case 32: /* FIXME: guessed values */
|
|
par->CRTC[0x13] = info->var.xres_virtual >> 1;
|
|
par->ExtCRTOffset = info->var.xres_virtual >> 9;
|
|
par->ExtColorModeSelect = 0x15;
|
|
break;
|
|
#endif
|
|
default:
|
|
break;
|
|
}
|
|
|
|
par->ExtCRTDispAddr = 0x10;
|
|
|
|
/* Vertical Extension */
|
|
par->VerticalExt = (((vtotal - 2) & 0x400) >> 10)
|
|
| (((info->var.yres - 1) & 0x400) >> 9)
|
|
| (((vsync_start) & 0x400) >> 8)
|
|
| (((vsync_start) & 0x400) >> 7);
|
|
|
|
/* Fast write bursts on unless disabled. */
|
|
if (par->pci_burst)
|
|
par->SysIfaceCntl1 = 0x30;
|
|
else
|
|
par->SysIfaceCntl1 = 0x00;
|
|
|
|
par->SysIfaceCntl2 = 0xc0; /* VESA Bios sets this to 0x80! */
|
|
|
|
/* Initialize: by default, we want display config register to be read */
|
|
par->PanelDispCntlRegRead = 1;
|
|
|
|
/* Enable any user specified display devices. */
|
|
par->PanelDispCntlReg1 = 0x00;
|
|
if (par->internal_display)
|
|
par->PanelDispCntlReg1 |= 0x02;
|
|
if (par->external_display)
|
|
par->PanelDispCntlReg1 |= 0x01;
|
|
|
|
/* If the user did not specify any display devices, then... */
|
|
if (par->PanelDispCntlReg1 == 0x00) {
|
|
/* Default to internal (i.e., LCD) only. */
|
|
par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
|
|
}
|
|
|
|
/* If we are using a fixed mode, then tell the chip we are. */
|
|
switch (info->var.xres) {
|
|
case 1280:
|
|
par->PanelDispCntlReg1 |= 0x60;
|
|
break;
|
|
case 1024:
|
|
par->PanelDispCntlReg1 |= 0x40;
|
|
break;
|
|
case 800:
|
|
par->PanelDispCntlReg1 |= 0x20;
|
|
break;
|
|
case 640:
|
|
default:
|
|
break;
|
|
}
|
|
|
|
/* Setup shadow register locking. */
|
|
switch (par->PanelDispCntlReg1 & 0x03) {
|
|
case 0x01: /* External CRT only mode: */
|
|
par->GeneralLockReg = 0x00;
|
|
/* We need to program the VCLK for external display only mode. */
|
|
par->ProgramVCLK = 1;
|
|
break;
|
|
case 0x02: /* Internal LCD only mode: */
|
|
case 0x03: /* Simultaneous internal/external (LCD/CRT) mode: */
|
|
par->GeneralLockReg = 0x01;
|
|
/* Don't program the VCLK when using the LCD. */
|
|
par->ProgramVCLK = 0;
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* If the screen is to be stretched, turn on stretching for the
|
|
* various modes.
|
|
*
|
|
* OPTION_LCD_STRETCH means stretching should be turned off!
|
|
*/
|
|
par->PanelDispCntlReg2 = 0x00;
|
|
par->PanelDispCntlReg3 = 0x00;
|
|
|
|
if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) && /* LCD only */
|
|
(info->var.xres != par->NeoPanelWidth)) {
|
|
switch (info->var.xres) {
|
|
case 320: /* Needs testing. KEM -- 24 May 98 */
|
|
case 400: /* Needs testing. KEM -- 24 May 98 */
|
|
case 640:
|
|
case 800:
|
|
case 1024:
|
|
lcd_stretch = 1;
|
|
par->PanelDispCntlReg2 |= 0xC6;
|
|
break;
|
|
default:
|
|
lcd_stretch = 0;
|
|
/* No stretching in these modes. */
|
|
}
|
|
} else
|
|
lcd_stretch = 0;
|
|
|
|
/*
|
|
* If the screen is to be centerd, turn on the centering for the
|
|
* various modes.
|
|
*/
|
|
par->PanelVertCenterReg1 = 0x00;
|
|
par->PanelVertCenterReg2 = 0x00;
|
|
par->PanelVertCenterReg3 = 0x00;
|
|
par->PanelVertCenterReg4 = 0x00;
|
|
par->PanelVertCenterReg5 = 0x00;
|
|
par->PanelHorizCenterReg1 = 0x00;
|
|
par->PanelHorizCenterReg2 = 0x00;
|
|
par->PanelHorizCenterReg3 = 0x00;
|
|
par->PanelHorizCenterReg4 = 0x00;
|
|
par->PanelHorizCenterReg5 = 0x00;
|
|
|
|
|
|
if (par->PanelDispCntlReg1 & 0x02) {
|
|
if (info->var.xres == par->NeoPanelWidth) {
|
|
/*
|
|
* No centering required when the requested display width
|
|
* equals the panel width.
|
|
*/
|
|
} else {
|
|
par->PanelDispCntlReg2 |= 0x01;
|
|
par->PanelDispCntlReg3 |= 0x10;
|
|
|
|
/* Calculate the horizontal and vertical offsets. */
|
|
if (!lcd_stretch) {
|
|
hoffset =
|
|
((par->NeoPanelWidth -
|
|
info->var.xres) >> 4) - 1;
|
|
voffset =
|
|
((par->NeoPanelHeight -
|
|
info->var.yres) >> 1) - 2;
|
|
} else {
|
|
/* Stretched modes cannot be centered. */
|
|
hoffset = 0;
|
|
voffset = 0;
|
|
}
|
|
|
|
switch (info->var.xres) {
|
|
case 320: /* Needs testing. KEM -- 24 May 98 */
|
|
par->PanelHorizCenterReg3 = hoffset;
|
|
par->PanelVertCenterReg2 = voffset;
|
|
break;
|
|
case 400: /* Needs testing. KEM -- 24 May 98 */
|
|
par->PanelHorizCenterReg4 = hoffset;
|
|
par->PanelVertCenterReg1 = voffset;
|
|
break;
|
|
case 640:
|
|
par->PanelHorizCenterReg1 = hoffset;
|
|
par->PanelVertCenterReg3 = voffset;
|
|
break;
|
|
case 800:
|
|
par->PanelHorizCenterReg2 = hoffset;
|
|
par->PanelVertCenterReg4 = voffset;
|
|
break;
|
|
case 1024:
|
|
par->PanelHorizCenterReg5 = hoffset;
|
|
par->PanelVertCenterReg5 = voffset;
|
|
break;
|
|
case 1280:
|
|
default:
|
|
/* No centering in these modes. */
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
par->biosMode =
|
|
neoFindMode(info->var.xres, info->var.yres,
|
|
info->var.bits_per_pixel);
|
|
|
|
/*
|
|
* Calculate the VCLK that most closely matches the requested dot
|
|
* clock.
|
|
*/
|
|
neoCalcVCLK(info, par, PICOS2KHZ(info->var.pixclock));
|
|
|
|
/* Since we program the clocks ourselves, always use VCLK3. */
|
|
par->MiscOutReg |= 0x0C;
|
|
|
|
/* alread unlocked above */
|
|
/* BOGUS vga_wgfx(NULL, 0x09, 0x26); */
|
|
|
|
/* don't know what this is, but it's 0 from bootup anyway */
|
|
vga_wgfx(NULL, 0x15, 0x00);
|
|
|
|
/* was set to 0x01 by my bios in text and vesa modes */
|
|
vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
|
|
|
|
/*
|
|
* The color mode needs to be set before calling vgaHWRestore
|
|
* to ensure the DAC is initialized properly.
|
|
*
|
|
* NOTE: Make sure we don't change bits make sure we don't change
|
|
* any reserved bits.
|
|
*/
|
|
temp = vga_rgfx(NULL, 0x90);
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2070:
|
|
temp &= 0xF0; /* Save bits 7:4 */
|
|
temp |= (par->ExtColorModeSelect & ~0xF0);
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2090:
|
|
case FB_ACCEL_NEOMAGIC_NM2093:
|
|
case FB_ACCEL_NEOMAGIC_NM2097:
|
|
case FB_ACCEL_NEOMAGIC_NM2160:
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
temp &= 0x70; /* Save bits 6:4 */
|
|
temp |= (par->ExtColorModeSelect & ~0x70);
|
|
break;
|
|
}
|
|
|
|
vga_wgfx(NULL, 0x90, temp);
|
|
|
|
/*
|
|
* In some rare cases a lockup might occur if we don't delay
|
|
* here. (Reported by Miles Lane)
|
|
*/
|
|
//mdelay(200);
|
|
|
|
/*
|
|
* Disable horizontal and vertical graphics and text expansions so
|
|
* that vgaHWRestore works properly.
|
|
*/
|
|
temp = vga_rgfx(NULL, 0x25);
|
|
temp &= 0x39;
|
|
vga_wgfx(NULL, 0x25, temp);
|
|
|
|
/*
|
|
* Sleep for 200ms to make sure that the two operations above have
|
|
* had time to take effect.
|
|
*/
|
|
mdelay(200);
|
|
|
|
/*
|
|
* This function handles restoring the generic VGA registers. */
|
|
vgaHWRestore(info, par);
|
|
|
|
/* linear colormap for non palettized modes */
|
|
switch (info->var.bits_per_pixel) {
|
|
case 8:
|
|
/* PseudoColor, 256 */
|
|
info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
|
|
break;
|
|
case 16:
|
|
/* TrueColor, 64k */
|
|
info->fix.visual = FB_VISUAL_TRUECOLOR;
|
|
|
|
for (i = 0; i < 64; i++) {
|
|
outb(i, 0x3c8);
|
|
|
|
outb(i << 1, 0x3c9);
|
|
outb(i, 0x3c9);
|
|
outb(i << 1, 0x3c9);
|
|
}
|
|
break;
|
|
case 24:
|
|
#ifdef NO_32BIT_SUPPORT_YET
|
|
case 32:
|
|
#endif
|
|
/* TrueColor, 16m */
|
|
info->fix.visual = FB_VISUAL_TRUECOLOR;
|
|
|
|
for (i = 0; i < 256; i++) {
|
|
outb(i, 0x3c8);
|
|
|
|
outb(i, 0x3c9);
|
|
outb(i, 0x3c9);
|
|
outb(i, 0x3c9);
|
|
}
|
|
break;
|
|
}
|
|
|
|
vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
|
|
vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
|
|
temp = vga_rgfx(NULL, 0x10);
|
|
temp &= 0x0F; /* Save bits 3:0 */
|
|
temp |= (par->SysIfaceCntl1 & ~0x0F); /* VESA Bios sets bit 1! */
|
|
vga_wgfx(NULL, 0x10, temp);
|
|
|
|
vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
|
|
vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
|
|
vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
|
|
|
|
temp = vga_rgfx(NULL, 0x20);
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2070:
|
|
temp &= 0xFC; /* Save bits 7:2 */
|
|
temp |= (par->PanelDispCntlReg1 & ~0xFC);
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2090:
|
|
case FB_ACCEL_NEOMAGIC_NM2093:
|
|
case FB_ACCEL_NEOMAGIC_NM2097:
|
|
case FB_ACCEL_NEOMAGIC_NM2160:
|
|
temp &= 0xDC; /* Save bits 7:6,4:2 */
|
|
temp |= (par->PanelDispCntlReg1 & ~0xDC);
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
temp &= 0x98; /* Save bits 7,4:3 */
|
|
temp |= (par->PanelDispCntlReg1 & ~0x98);
|
|
break;
|
|
}
|
|
vga_wgfx(NULL, 0x20, temp);
|
|
|
|
temp = vga_rgfx(NULL, 0x25);
|
|
temp &= 0x38; /* Save bits 5:3 */
|
|
temp |= (par->PanelDispCntlReg2 & ~0x38);
|
|
vga_wgfx(NULL, 0x25, temp);
|
|
|
|
if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
|
|
temp = vga_rgfx(NULL, 0x30);
|
|
temp &= 0xEF; /* Save bits 7:5 and bits 3:0 */
|
|
temp |= (par->PanelDispCntlReg3 & ~0xEF);
|
|
vga_wgfx(NULL, 0x30, temp);
|
|
}
|
|
|
|
vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
|
|
vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
|
|
vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
|
|
|
|
if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
|
|
vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
|
|
vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
|
|
vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
|
|
vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
|
|
}
|
|
|
|
if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
|
|
vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
|
|
|
|
if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
|
|
info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
|
|
info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
|
|
info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
|
|
vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
|
|
vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
|
|
vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
|
|
|
|
clock_hi = 1;
|
|
}
|
|
|
|
/* Program VCLK3 if needed. */
|
|
if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
|
|
|| (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
|
|
|| (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
|
|
!= (par->VCLK3NumeratorHigh &
|
|
~0x0F))))) {
|
|
vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
|
|
if (clock_hi) {
|
|
temp = vga_rgfx(NULL, 0x8F);
|
|
temp &= 0x0F; /* Save bits 3:0 */
|
|
temp |= (par->VCLK3NumeratorHigh & ~0x0F);
|
|
vga_wgfx(NULL, 0x8F, temp);
|
|
}
|
|
vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
|
|
}
|
|
|
|
if (par->biosMode)
|
|
vga_wcrt(NULL, 0x23, par->biosMode);
|
|
|
|
vga_wgfx(NULL, 0x93, 0xc0); /* Gives 5x faster framebuffer writes !!! */
|
|
|
|
/* Program vertical extension register */
|
|
if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
|
|
info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
|
|
info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
|
|
info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
|
|
vga_wcrt(NULL, 0x70, par->VerticalExt);
|
|
}
|
|
|
|
vgaHWProtect(0); /* Turn on screen */
|
|
|
|
/* Calling this also locks offset registers required in update_start */
|
|
neoLock(&par->state);
|
|
|
|
info->fix.line_length =
|
|
info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
|
|
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
neo2200_accel_init(info, &info->var);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Pan or Wrap the Display
|
|
*/
|
|
static int neofb_pan_display(struct fb_var_screeninfo *var,
|
|
struct fb_info *info)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
struct vgastate *state = &par->state;
|
|
int oldExtCRTDispAddr;
|
|
int Base;
|
|
|
|
DBG("neofb_update_start");
|
|
|
|
Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
|
|
Base *= (var->bits_per_pixel + 7) / 8;
|
|
|
|
neoUnlock();
|
|
|
|
/*
|
|
* These are the generic starting address registers.
|
|
*/
|
|
vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
|
|
vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
|
|
|
|
/*
|
|
* Make sure we don't clobber some other bits that might already
|
|
* have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
|
|
* be needed.
|
|
*/
|
|
oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
|
|
vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
|
|
|
|
neoLock(state);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
|
|
u_int transp, struct fb_info *fb)
|
|
{
|
|
if (regno >= fb->cmap.len || regno > 255)
|
|
return -EINVAL;
|
|
|
|
if (fb->var.bits_per_pixel <= 8) {
|
|
outb(regno, 0x3c8);
|
|
|
|
outb(red >> 10, 0x3c9);
|
|
outb(green >> 10, 0x3c9);
|
|
outb(blue >> 10, 0x3c9);
|
|
} else if (regno < 16) {
|
|
switch (fb->var.bits_per_pixel) {
|
|
case 16:
|
|
((u32 *) fb->pseudo_palette)[regno] =
|
|
((red & 0xf800)) | ((green & 0xfc00) >> 5) |
|
|
((blue & 0xf800) >> 11);
|
|
break;
|
|
case 24:
|
|
((u32 *) fb->pseudo_palette)[regno] =
|
|
((red & 0xff00) << 8) | ((green & 0xff00)) |
|
|
((blue & 0xff00) >> 8);
|
|
break;
|
|
#ifdef NO_32BIT_SUPPORT_YET
|
|
case 32:
|
|
((u32 *) fb->pseudo_palette)[regno] =
|
|
((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
|
|
((green & 0xff00)) | ((blue & 0xff00) >> 8);
|
|
break;
|
|
#endif
|
|
default:
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* (Un)Blank the display.
|
|
*/
|
|
static int neofb_blank(int blank_mode, struct fb_info *info)
|
|
{
|
|
/*
|
|
* Blank the screen if blank_mode != 0, else unblank.
|
|
* Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
|
|
* e.g. a video mode which doesn't support it. Implements VESA suspend
|
|
* and powerdown modes for monitors, and backlight control on LCDs.
|
|
* blank_mode == 0: unblanked (backlight on)
|
|
* blank_mode == 1: blank (backlight on)
|
|
* blank_mode == 2: suspend vsync (backlight off)
|
|
* blank_mode == 3: suspend hsync (backlight off)
|
|
* blank_mode == 4: powerdown (backlight off)
|
|
*
|
|
* wms...Enable VESA DPMS compatible powerdown mode
|
|
* run "setterm -powersave powerdown" to take advantage
|
|
*/
|
|
struct neofb_par *par = info->par;
|
|
int seqflags, lcdflags, dpmsflags, reg, tmpdisp;
|
|
|
|
/*
|
|
* Read back the register bits related to display configuration. They might
|
|
* have been changed underneath the driver via Fn key stroke.
|
|
*/
|
|
neoUnlock();
|
|
tmpdisp = vga_rgfx(NULL, 0x20) & 0x03;
|
|
neoLock(&par->state);
|
|
|
|
/* In case we blank the screen, we want to store the possibly new
|
|
* configuration in the driver. During un-blank, we re-apply this setting,
|
|
* since the LCD bit will be cleared in order to switch off the backlight.
|
|
*/
|
|
if (par->PanelDispCntlRegRead) {
|
|
par->PanelDispCntlReg1 = tmpdisp;
|
|
}
|
|
par->PanelDispCntlRegRead = !blank_mode;
|
|
|
|
switch (blank_mode) {
|
|
case FB_BLANK_POWERDOWN: /* powerdown - both sync lines down */
|
|
seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
|
|
lcdflags = 0; /* LCD off */
|
|
dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
|
|
NEO_GR01_SUPPRESS_VSYNC;
|
|
#ifdef CONFIG_TOSHIBA
|
|
/* Do we still need this ? */
|
|
/* attempt to turn off backlight on toshiba; also turns off external */
|
|
{
|
|
SMMRegisters regs;
|
|
|
|
regs.eax = 0xff00; /* HCI_SET */
|
|
regs.ebx = 0x0002; /* HCI_BACKLIGHT */
|
|
regs.ecx = 0x0000; /* HCI_DISABLE */
|
|
tosh_smm(®s);
|
|
}
|
|
#endif
|
|
break;
|
|
case FB_BLANK_HSYNC_SUSPEND: /* hsync off */
|
|
seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
|
|
lcdflags = 0; /* LCD off */
|
|
dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
|
|
break;
|
|
case FB_BLANK_VSYNC_SUSPEND: /* vsync off */
|
|
seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
|
|
lcdflags = 0; /* LCD off */
|
|
dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
|
|
break;
|
|
case FB_BLANK_NORMAL: /* just blank screen (backlight stays on) */
|
|
seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
|
|
/*
|
|
* During a blank operation with the LID shut, we might store "LCD off"
|
|
* by mistake. Due to timing issues, the BIOS may switch the lights
|
|
* back on, and we turn it back off once we "unblank".
|
|
*
|
|
* So here is an attempt to implement ">=" - if we are in the process
|
|
* of unblanking, and the LCD bit is unset in the driver but set in the
|
|
* register, we must keep it.
|
|
*/
|
|
lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
|
|
dpmsflags = 0x00; /* no hsync/vsync suppression */
|
|
break;
|
|
case FB_BLANK_UNBLANK: /* unblank */
|
|
seqflags = 0; /* Enable sequencer */
|
|
lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
|
|
dpmsflags = 0x00; /* no hsync/vsync suppression */
|
|
#ifdef CONFIG_TOSHIBA
|
|
/* Do we still need this ? */
|
|
/* attempt to re-enable backlight/external on toshiba */
|
|
{
|
|
SMMRegisters regs;
|
|
|
|
regs.eax = 0xff00; /* HCI_SET */
|
|
regs.ebx = 0x0002; /* HCI_BACKLIGHT */
|
|
regs.ecx = 0x0001; /* HCI_ENABLE */
|
|
tosh_smm(®s);
|
|
}
|
|
#endif
|
|
break;
|
|
default: /* Anything else we don't understand; return 1 to tell
|
|
* fb_blank we didn't aactually do anything */
|
|
return 1;
|
|
}
|
|
|
|
neoUnlock();
|
|
reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
|
|
vga_wseq(NULL, 0x01, reg);
|
|
reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
|
|
vga_wgfx(NULL, 0x20, reg);
|
|
reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
|
|
vga_wgfx(NULL, 0x01, reg);
|
|
neoLock(&par->state);
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
u_long dst, rop;
|
|
|
|
dst = rect->dx + rect->dy * info->var.xres_virtual;
|
|
rop = rect->rop ? 0x060000 : 0x0c0000;
|
|
|
|
neo2200_wait_fifo(info, 4);
|
|
|
|
/* set blt control */
|
|
writel(NEO_BC3_FIFO_EN |
|
|
NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
|
|
// NEO_BC3_DST_XY_ADDR |
|
|
// NEO_BC3_SRC_XY_ADDR |
|
|
rop, &par->neo2200->bltCntl);
|
|
|
|
switch (info->var.bits_per_pixel) {
|
|
case 8:
|
|
writel(rect->color, &par->neo2200->fgColor);
|
|
break;
|
|
case 16:
|
|
case 24:
|
|
writel(((u32 *) (info->pseudo_palette))[rect->color],
|
|
&par->neo2200->fgColor);
|
|
break;
|
|
}
|
|
|
|
writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
|
|
&par->neo2200->dstStart);
|
|
writel((rect->height << 16) | (rect->width & 0xffff),
|
|
&par->neo2200->xyExt);
|
|
}
|
|
|
|
static void
|
|
neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
|
|
{
|
|
u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
|
|
struct neofb_par *par = info->par;
|
|
u_long src, dst, bltCntl;
|
|
|
|
bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
|
|
|
|
if ((dy > sy) || ((dy == sy) && (dx > sx))) {
|
|
/* Start with the lower right corner */
|
|
sy += (area->height - 1);
|
|
dy += (area->height - 1);
|
|
sx += (area->width - 1);
|
|
dx += (area->width - 1);
|
|
|
|
bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
|
|
}
|
|
|
|
src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
|
|
dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
|
|
|
|
neo2200_wait_fifo(info, 4);
|
|
|
|
/* set blt control */
|
|
writel(bltCntl, &par->neo2200->bltCntl);
|
|
|
|
writel(src, &par->neo2200->srcStart);
|
|
writel(dst, &par->neo2200->dstStart);
|
|
writel((area->height << 16) | (area->width & 0xffff),
|
|
&par->neo2200->xyExt);
|
|
}
|
|
|
|
static void
|
|
neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
int s_pitch = (image->width * image->depth + 7) >> 3;
|
|
int scan_align = info->pixmap.scan_align - 1;
|
|
int buf_align = info->pixmap.buf_align - 1;
|
|
int bltCntl_flags, d_pitch, data_len;
|
|
|
|
// The data is padded for the hardware
|
|
d_pitch = (s_pitch + scan_align) & ~scan_align;
|
|
data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
|
|
|
|
neo2200_sync(info);
|
|
|
|
if (image->depth == 1) {
|
|
if (info->var.bits_per_pixel == 24 && image->width < 16) {
|
|
/* FIXME. There is a bug with accelerated color-expanded
|
|
* transfers in 24 bit mode if the image being transferred
|
|
* is less than 16 bits wide. This is due to insufficient
|
|
* padding when writing the image. We need to adjust
|
|
* struct fb_pixmap. Not yet done. */
|
|
cfb_imageblit(info, image);
|
|
return;
|
|
}
|
|
bltCntl_flags = NEO_BC0_SRC_MONO;
|
|
} else if (image->depth == info->var.bits_per_pixel) {
|
|
bltCntl_flags = 0;
|
|
} else {
|
|
/* We don't currently support hardware acceleration if image
|
|
* depth is different from display */
|
|
cfb_imageblit(info, image);
|
|
return;
|
|
}
|
|
|
|
switch (info->var.bits_per_pixel) {
|
|
case 8:
|
|
writel(image->fg_color, &par->neo2200->fgColor);
|
|
writel(image->bg_color, &par->neo2200->bgColor);
|
|
break;
|
|
case 16:
|
|
case 24:
|
|
writel(((u32 *) (info->pseudo_palette))[image->fg_color],
|
|
&par->neo2200->fgColor);
|
|
writel(((u32 *) (info->pseudo_palette))[image->bg_color],
|
|
&par->neo2200->bgColor);
|
|
break;
|
|
}
|
|
|
|
writel(NEO_BC0_SYS_TO_VID |
|
|
NEO_BC3_SKIP_MAPPING | bltCntl_flags |
|
|
// NEO_BC3_DST_XY_ADDR |
|
|
0x0c0000, &par->neo2200->bltCntl);
|
|
|
|
writel(0, &par->neo2200->srcStart);
|
|
// par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
|
|
writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
|
|
image->dy * info->fix.line_length), &par->neo2200->dstStart);
|
|
writel((image->height << 16) | (image->width & 0xffff),
|
|
&par->neo2200->xyExt);
|
|
|
|
memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
|
|
}
|
|
|
|
static void
|
|
neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
|
|
{
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
neo2200_fillrect(info, rect);
|
|
break;
|
|
default:
|
|
cfb_fillrect(info, rect);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void
|
|
neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
|
|
{
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
neo2200_copyarea(info, area);
|
|
break;
|
|
default:
|
|
cfb_copyarea(info, area);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static void
|
|
neofb_imageblit(struct fb_info *info, const struct fb_image *image)
|
|
{
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
neo2200_imageblit(info, image);
|
|
break;
|
|
default:
|
|
cfb_imageblit(info, image);
|
|
break;
|
|
}
|
|
}
|
|
|
|
static int
|
|
neofb_sync(struct fb_info *info)
|
|
{
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
neo2200_sync(info);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
static void
|
|
neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
|
|
{
|
|
//memset_io(info->sprite.addr, 0xff, 1);
|
|
}
|
|
|
|
static int
|
|
neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
|
|
{
|
|
struct neofb_par *par = (struct neofb_par *) info->par;
|
|
|
|
* Disable cursor *
|
|
write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
|
|
|
|
if (cursor->set & FB_CUR_SETPOS) {
|
|
u32 x = cursor->image.dx;
|
|
u32 y = cursor->image.dy;
|
|
|
|
info->cursor.image.dx = x;
|
|
info->cursor.image.dy = y;
|
|
write_le32(NEOREG_CURSX, x, par);
|
|
write_le32(NEOREG_CURSY, y, par);
|
|
}
|
|
|
|
if (cursor->set & FB_CUR_SETSIZE) {
|
|
info->cursor.image.height = cursor->image.height;
|
|
info->cursor.image.width = cursor->image.width;
|
|
}
|
|
|
|
if (cursor->set & FB_CUR_SETHOT)
|
|
info->cursor.hot = cursor->hot;
|
|
|
|
if (cursor->set & FB_CUR_SETCMAP) {
|
|
if (cursor->image.depth == 1) {
|
|
u32 fg = cursor->image.fg_color;
|
|
u32 bg = cursor->image.bg_color;
|
|
|
|
info->cursor.image.fg_color = fg;
|
|
info->cursor.image.bg_color = bg;
|
|
|
|
fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
|
|
bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
|
|
write_le32(NEOREG_CURSFGCOLOR, fg, par);
|
|
write_le32(NEOREG_CURSBGCOLOR, bg, par);
|
|
}
|
|
}
|
|
|
|
if (cursor->set & FB_CUR_SETSHAPE)
|
|
fb_load_cursor_image(info);
|
|
|
|
if (info->cursor.enable)
|
|
write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
|
|
return 0;
|
|
}
|
|
*/
|
|
|
|
static struct fb_ops neofb_ops = {
|
|
.owner = THIS_MODULE,
|
|
.fb_open = neofb_open,
|
|
.fb_release = neofb_release,
|
|
.fb_check_var = neofb_check_var,
|
|
.fb_set_par = neofb_set_par,
|
|
.fb_setcolreg = neofb_setcolreg,
|
|
.fb_pan_display = neofb_pan_display,
|
|
.fb_blank = neofb_blank,
|
|
.fb_sync = neofb_sync,
|
|
.fb_fillrect = neofb_fillrect,
|
|
.fb_copyarea = neofb_copyarea,
|
|
.fb_imageblit = neofb_imageblit,
|
|
};
|
|
|
|
/* --------------------------------------------------------------------- */
|
|
|
|
static struct fb_videomode __devinitdata mode800x480 = {
|
|
.xres = 800,
|
|
.yres = 480,
|
|
.pixclock = 25000,
|
|
.left_margin = 88,
|
|
.right_margin = 40,
|
|
.upper_margin = 23,
|
|
.lower_margin = 1,
|
|
.hsync_len = 128,
|
|
.vsync_len = 4,
|
|
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
|
|
.vmode = FB_VMODE_NONINTERLACED
|
|
};
|
|
|
|
static int __devinit neo_map_mmio(struct fb_info *info,
|
|
struct pci_dev *dev)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
|
|
DBG("neo_map_mmio");
|
|
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2070:
|
|
info->fix.mmio_start = pci_resource_start(dev, 0)+
|
|
0x100000;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2090:
|
|
case FB_ACCEL_NEOMAGIC_NM2093:
|
|
info->fix.mmio_start = pci_resource_start(dev, 0)+
|
|
0x200000;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2160:
|
|
case FB_ACCEL_NEOMAGIC_NM2097:
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
info->fix.mmio_start = pci_resource_start(dev, 1);
|
|
break;
|
|
default:
|
|
info->fix.mmio_start = pci_resource_start(dev, 0);
|
|
}
|
|
info->fix.mmio_len = MMIO_SIZE;
|
|
|
|
if (!request_mem_region
|
|
(info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
|
|
printk("neofb: memory mapped IO in use\n");
|
|
return -EBUSY;
|
|
}
|
|
|
|
par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
|
|
if (!par->mmio_vbase) {
|
|
printk("neofb: unable to map memory mapped IO\n");
|
|
release_mem_region(info->fix.mmio_start,
|
|
info->fix.mmio_len);
|
|
return -ENOMEM;
|
|
} else
|
|
printk(KERN_INFO "neofb: mapped io at %p\n",
|
|
par->mmio_vbase);
|
|
return 0;
|
|
}
|
|
|
|
static void neo_unmap_mmio(struct fb_info *info)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
|
|
DBG("neo_unmap_mmio");
|
|
|
|
iounmap(par->mmio_vbase);
|
|
par->mmio_vbase = NULL;
|
|
|
|
release_mem_region(info->fix.mmio_start,
|
|
info->fix.mmio_len);
|
|
}
|
|
|
|
static int __devinit neo_map_video(struct fb_info *info,
|
|
struct pci_dev *dev, int video_len)
|
|
{
|
|
//unsigned long addr;
|
|
|
|
DBG("neo_map_video");
|
|
|
|
info->fix.smem_start = pci_resource_start(dev, 0);
|
|
info->fix.smem_len = video_len;
|
|
|
|
if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
|
|
"frame buffer")) {
|
|
printk("neofb: frame buffer in use\n");
|
|
return -EBUSY;
|
|
}
|
|
|
|
info->screen_base =
|
|
ioremap(info->fix.smem_start, info->fix.smem_len);
|
|
if (!info->screen_base) {
|
|
printk("neofb: unable to map screen memory\n");
|
|
release_mem_region(info->fix.smem_start,
|
|
info->fix.smem_len);
|
|
return -ENOMEM;
|
|
} else
|
|
printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
|
|
info->screen_base);
|
|
|
|
#ifdef CONFIG_MTRR
|
|
((struct neofb_par *)(info->par))->mtrr =
|
|
mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
|
|
MTRR_TYPE_WRCOMB, 1);
|
|
#endif
|
|
|
|
/* Clear framebuffer, it's all white in memory after boot */
|
|
memset_io(info->screen_base, 0, info->fix.smem_len);
|
|
|
|
/* Allocate Cursor drawing pad.
|
|
info->fix.smem_len -= PAGE_SIZE;
|
|
addr = info->fix.smem_start + info->fix.smem_len;
|
|
write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
|
|
((0x0ff0 & (addr >> 10)) >> 4), par);
|
|
addr = (unsigned long) info->screen_base + info->fix.smem_len;
|
|
info->sprite.addr = (u8 *) addr; */
|
|
return 0;
|
|
}
|
|
|
|
static void neo_unmap_video(struct fb_info *info)
|
|
{
|
|
DBG("neo_unmap_video");
|
|
|
|
#ifdef CONFIG_MTRR
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
|
|
mtrr_del(par->mtrr, info->fix.smem_start,
|
|
info->fix.smem_len);
|
|
}
|
|
#endif
|
|
iounmap(info->screen_base);
|
|
info->screen_base = NULL;
|
|
|
|
release_mem_region(info->fix.smem_start,
|
|
info->fix.smem_len);
|
|
}
|
|
|
|
static int __devinit neo_scan_monitor(struct fb_info *info)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
unsigned char type, display;
|
|
int w;
|
|
|
|
// Eventually we will have i2c support.
|
|
info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
|
|
if (!info->monspecs.modedb)
|
|
return -ENOMEM;
|
|
info->monspecs.modedb_len = 1;
|
|
|
|
/* Determine the panel type */
|
|
vga_wgfx(NULL, 0x09, 0x26);
|
|
type = vga_rgfx(NULL, 0x21);
|
|
display = vga_rgfx(NULL, 0x20);
|
|
if (!par->internal_display && !par->external_display) {
|
|
par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
|
|
par->external_display = display & 1;
|
|
printk (KERN_INFO "Autodetected %s display\n",
|
|
par->internal_display && par->external_display ? "simultaneous" :
|
|
par->internal_display ? "internal" : "external");
|
|
}
|
|
|
|
/* Determine panel width -- used in NeoValidMode. */
|
|
w = vga_rgfx(NULL, 0x20);
|
|
vga_wgfx(NULL, 0x09, 0x00);
|
|
switch ((w & 0x18) >> 3) {
|
|
case 0x00:
|
|
// 640x480@60
|
|
par->NeoPanelWidth = 640;
|
|
par->NeoPanelHeight = 480;
|
|
memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
|
|
break;
|
|
case 0x01:
|
|
par->NeoPanelWidth = 800;
|
|
if (par->libretto) {
|
|
par->NeoPanelHeight = 480;
|
|
memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
|
|
} else {
|
|
// 800x600@60
|
|
par->NeoPanelHeight = 600;
|
|
memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
|
|
}
|
|
break;
|
|
case 0x02:
|
|
// 1024x768@60
|
|
par->NeoPanelWidth = 1024;
|
|
par->NeoPanelHeight = 768;
|
|
memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
|
|
break;
|
|
case 0x03:
|
|
/* 1280x1024@60 panel support needs to be added */
|
|
#ifdef NOT_DONE
|
|
par->NeoPanelWidth = 1280;
|
|
par->NeoPanelHeight = 1024;
|
|
memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
|
|
break;
|
|
#else
|
|
printk(KERN_ERR
|
|
"neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
|
|
return -1;
|
|
#endif
|
|
default:
|
|
// 640x480@60
|
|
par->NeoPanelWidth = 640;
|
|
par->NeoPanelHeight = 480;
|
|
memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
|
|
break;
|
|
}
|
|
|
|
printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
|
|
par->NeoPanelWidth,
|
|
par->NeoPanelHeight,
|
|
(type & 0x02) ? "color" : "monochrome",
|
|
(type & 0x10) ? "TFT" : "dual scan");
|
|
return 0;
|
|
}
|
|
|
|
static int __devinit neo_init_hw(struct fb_info *info)
|
|
{
|
|
struct neofb_par *par = info->par;
|
|
int videoRam = 896;
|
|
int maxClock = 65000;
|
|
int CursorMem = 1024;
|
|
int CursorOff = 0x100;
|
|
|
|
DBG("neo_init_hw");
|
|
|
|
neoUnlock();
|
|
|
|
#if 0
|
|
printk(KERN_DEBUG "--- Neo extended register dump ---\n");
|
|
for (int w = 0; w < 0x85; w++)
|
|
printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
|
|
(void *) vga_rcrt(NULL, w));
|
|
for (int w = 0; w < 0xC7; w++)
|
|
printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
|
|
(void *) vga_rgfx(NULL, w));
|
|
#endif
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2070:
|
|
videoRam = 896;
|
|
maxClock = 65000;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2090:
|
|
case FB_ACCEL_NEOMAGIC_NM2093:
|
|
case FB_ACCEL_NEOMAGIC_NM2097:
|
|
videoRam = 1152;
|
|
maxClock = 80000;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2160:
|
|
videoRam = 2048;
|
|
maxClock = 90000;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
videoRam = 2560;
|
|
maxClock = 110000;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
videoRam = 3008;
|
|
maxClock = 110000;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
videoRam = 4096;
|
|
maxClock = 110000;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
videoRam = 6144;
|
|
maxClock = 110000;
|
|
break;
|
|
}
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2070:
|
|
case FB_ACCEL_NEOMAGIC_NM2090:
|
|
case FB_ACCEL_NEOMAGIC_NM2093:
|
|
CursorMem = 2048;
|
|
CursorOff = 0x100;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2097:
|
|
case FB_ACCEL_NEOMAGIC_NM2160:
|
|
CursorMem = 1024;
|
|
CursorOff = 0x100;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
CursorMem = 1024;
|
|
CursorOff = 0x1000;
|
|
|
|
par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
|
|
break;
|
|
}
|
|
/*
|
|
info->sprite.size = CursorMem;
|
|
info->sprite.scan_align = 1;
|
|
info->sprite.buf_align = 1;
|
|
info->sprite.flags = FB_PIXMAP_IO;
|
|
info->sprite.outbuf = neofb_draw_cursor;
|
|
*/
|
|
par->maxClock = maxClock;
|
|
par->cursorOff = CursorOff;
|
|
return videoRam * 1024;
|
|
}
|
|
|
|
|
|
static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
|
|
pci_device_id *id)
|
|
{
|
|
struct fb_info *info;
|
|
struct neofb_par *par;
|
|
|
|
info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
|
|
|
|
if (!info)
|
|
return NULL;
|
|
|
|
par = info->par;
|
|
|
|
info->fix.accel = id->driver_data;
|
|
|
|
par->pci_burst = !nopciburst;
|
|
par->lcd_stretch = !nostretch;
|
|
par->libretto = libretto;
|
|
|
|
par->internal_display = internal;
|
|
par->external_display = external;
|
|
info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
|
|
|
|
switch (info->fix.accel) {
|
|
case FB_ACCEL_NEOMAGIC_NM2070:
|
|
snprintf(info->fix.id, sizeof(info->fix.id),
|
|
"MagicGraph 128");
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2090:
|
|
snprintf(info->fix.id, sizeof(info->fix.id),
|
|
"MagicGraph 128V");
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2093:
|
|
snprintf(info->fix.id, sizeof(info->fix.id),
|
|
"MagicGraph 128ZV");
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2097:
|
|
snprintf(info->fix.id, sizeof(info->fix.id),
|
|
"MagicGraph 128ZV+");
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2160:
|
|
snprintf(info->fix.id, sizeof(info->fix.id),
|
|
"MagicGraph 128XD");
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2200:
|
|
snprintf(info->fix.id, sizeof(info->fix.id),
|
|
"MagicGraph 256AV");
|
|
info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
|
|
FBINFO_HWACCEL_COPYAREA |
|
|
FBINFO_HWACCEL_FILLRECT;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2230:
|
|
snprintf(info->fix.id, sizeof(info->fix.id),
|
|
"MagicGraph 256AV+");
|
|
info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
|
|
FBINFO_HWACCEL_COPYAREA |
|
|
FBINFO_HWACCEL_FILLRECT;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2360:
|
|
snprintf(info->fix.id, sizeof(info->fix.id),
|
|
"MagicGraph 256ZX");
|
|
info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
|
|
FBINFO_HWACCEL_COPYAREA |
|
|
FBINFO_HWACCEL_FILLRECT;
|
|
break;
|
|
case FB_ACCEL_NEOMAGIC_NM2380:
|
|
snprintf(info->fix.id, sizeof(info->fix.id),
|
|
"MagicGraph 256XL+");
|
|
info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
|
|
FBINFO_HWACCEL_COPYAREA |
|
|
FBINFO_HWACCEL_FILLRECT;
|
|
break;
|
|
}
|
|
|
|
info->fix.type = FB_TYPE_PACKED_PIXELS;
|
|
info->fix.type_aux = 0;
|
|
info->fix.xpanstep = 0;
|
|
info->fix.ypanstep = 4;
|
|
info->fix.ywrapstep = 0;
|
|
info->fix.accel = id->driver_data;
|
|
|
|
info->fbops = &neofb_ops;
|
|
info->pseudo_palette = par->palette;
|
|
return info;
|
|
}
|
|
|
|
static void neo_free_fb_info(struct fb_info *info)
|
|
{
|
|
if (info) {
|
|
/*
|
|
* Free the colourmap
|
|
*/
|
|
fb_dealloc_cmap(&info->cmap);
|
|
framebuffer_release(info);
|
|
}
|
|
}
|
|
|
|
/* --------------------------------------------------------------------- */
|
|
|
|
static int __devinit neofb_probe(struct pci_dev *dev,
|
|
const struct pci_device_id *id)
|
|
{
|
|
struct fb_info *info;
|
|
u_int h_sync, v_sync;
|
|
int video_len, err;
|
|
|
|
DBG("neofb_probe");
|
|
|
|
err = pci_enable_device(dev);
|
|
if (err)
|
|
return err;
|
|
|
|
err = -ENOMEM;
|
|
info = neo_alloc_fb_info(dev, id);
|
|
if (!info)
|
|
return err;
|
|
|
|
err = neo_map_mmio(info, dev);
|
|
if (err)
|
|
goto err_map_mmio;
|
|
|
|
err = neo_scan_monitor(info);
|
|
if (err)
|
|
goto err_scan_monitor;
|
|
|
|
video_len = neo_init_hw(info);
|
|
if (video_len < 0) {
|
|
err = video_len;
|
|
goto err_init_hw;
|
|
}
|
|
|
|
err = neo_map_video(info, dev, video_len);
|
|
if (err)
|
|
goto err_init_hw;
|
|
|
|
if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
|
|
info->monspecs.modedb, 16)) {
|
|
printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
|
|
goto err_map_video;
|
|
}
|
|
|
|
/*
|
|
* Calculate the hsync and vsync frequencies. Note that
|
|
* we split the 1e12 constant up so that we can preserve
|
|
* the precision and fit the results into 32-bit registers.
|
|
* (1953125000 * 512 = 1e12)
|
|
*/
|
|
h_sync = 1953125000 / info->var.pixclock;
|
|
h_sync =
|
|
h_sync * 512 / (info->var.xres + info->var.left_margin +
|
|
info->var.right_margin + info->var.hsync_len);
|
|
v_sync =
|
|
h_sync / (info->var.yres + info->var.upper_margin +
|
|
info->var.lower_margin + info->var.vsync_len);
|
|
|
|
printk(KERN_INFO "neofb v" NEOFB_VERSION
|
|
": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
|
|
info->fix.smem_len >> 10, info->var.xres,
|
|
info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
|
|
|
|
if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
|
|
goto err_map_video;
|
|
|
|
err = register_framebuffer(info);
|
|
if (err < 0)
|
|
goto err_reg_fb;
|
|
|
|
printk(KERN_INFO "fb%d: %s frame buffer device\n",
|
|
info->node, info->fix.id);
|
|
|
|
/*
|
|
* Our driver data
|
|
*/
|
|
pci_set_drvdata(dev, info);
|
|
return 0;
|
|
|
|
err_reg_fb:
|
|
fb_dealloc_cmap(&info->cmap);
|
|
err_map_video:
|
|
neo_unmap_video(info);
|
|
err_init_hw:
|
|
fb_destroy_modedb(info->monspecs.modedb);
|
|
err_scan_monitor:
|
|
neo_unmap_mmio(info);
|
|
err_map_mmio:
|
|
neo_free_fb_info(info);
|
|
return err;
|
|
}
|
|
|
|
static void __devexit neofb_remove(struct pci_dev *dev)
|
|
{
|
|
struct fb_info *info = pci_get_drvdata(dev);
|
|
|
|
DBG("neofb_remove");
|
|
|
|
if (info) {
|
|
/*
|
|
* If unregister_framebuffer fails, then
|
|
* we will be leaving hooks that could cause
|
|
* oopsen laying around.
|
|
*/
|
|
if (unregister_framebuffer(info))
|
|
printk(KERN_WARNING
|
|
"neofb: danger danger! Oopsen imminent!\n");
|
|
|
|
neo_unmap_video(info);
|
|
fb_destroy_modedb(info->monspecs.modedb);
|
|
neo_unmap_mmio(info);
|
|
neo_free_fb_info(info);
|
|
|
|
/*
|
|
* Ensure that the driver data is no longer
|
|
* valid.
|
|
*/
|
|
pci_set_drvdata(dev, NULL);
|
|
}
|
|
}
|
|
|
|
static struct pci_device_id neofb_devices[] = {
|
|
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
|
|
|
|
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
|
|
|
|
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
|
|
|
|
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
|
|
|
|
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
|
|
|
|
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
|
|
|
|
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
|
|
|
|
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
|
|
|
|
{PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
|
|
PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
|
|
|
|
{0, 0, 0, 0, 0, 0, 0}
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, neofb_devices);
|
|
|
|
static struct pci_driver neofb_driver = {
|
|
.name = "neofb",
|
|
.id_table = neofb_devices,
|
|
.probe = neofb_probe,
|
|
.remove = __devexit_p(neofb_remove)
|
|
};
|
|
|
|
/* ************************* init in-kernel code ************************** */
|
|
|
|
#ifndef MODULE
|
|
static int __init neofb_setup(char *options)
|
|
{
|
|
char *this_opt;
|
|
|
|
DBG("neofb_setup");
|
|
|
|
if (!options || !*options)
|
|
return 0;
|
|
|
|
while ((this_opt = strsep(&options, ",")) != NULL) {
|
|
if (!*this_opt)
|
|
continue;
|
|
|
|
if (!strncmp(this_opt, "internal", 8))
|
|
internal = 1;
|
|
else if (!strncmp(this_opt, "external", 8))
|
|
external = 1;
|
|
else if (!strncmp(this_opt, "nostretch", 9))
|
|
nostretch = 1;
|
|
else if (!strncmp(this_opt, "nopciburst", 10))
|
|
nopciburst = 1;
|
|
else if (!strncmp(this_opt, "libretto", 8))
|
|
libretto = 1;
|
|
else
|
|
mode_option = this_opt;
|
|
}
|
|
return 0;
|
|
}
|
|
#endif /* MODULE */
|
|
|
|
static int __init neofb_init(void)
|
|
{
|
|
#ifndef MODULE
|
|
char *option = NULL;
|
|
|
|
if (fb_get_options("neofb", &option))
|
|
return -ENODEV;
|
|
neofb_setup(option);
|
|
#endif
|
|
return pci_register_driver(&neofb_driver);
|
|
}
|
|
|
|
module_init(neofb_init);
|
|
|
|
#ifdef MODULE
|
|
static void __exit neofb_exit(void)
|
|
{
|
|
pci_unregister_driver(&neofb_driver);
|
|
}
|
|
|
|
module_exit(neofb_exit);
|
|
#endif /* MODULE */
|