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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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daf273350d
*) new PHY driver for hi6220 usb and rcar gen3 usb2
*) deprecate phy-omap-control driver. phy-omap-control driver was added
when there was no proper infrastructure for doing control module
initialization. The phy-omap-control driver is not an 'actual' PHY
driver and it was just a hack to do PHY related control module
initialization. Now with SYSCON framework in the kernel, control
module setttings can be done using APIs provided by syscon.
*) usbphy-internal pll creates the needed 480MHz and is also a
supply-clock back to the core clock-controller in Rockchip SoCs.
This is now modeled as a real clock.
*) calibrate mt65xx usb3 PHY for better eye diagram and receiver
sensitivity.
*) Miscellaneous cleanups.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJWeR+CAAoJEA5ceFyATYLZG8QP/jlux4ejRKhaO/BYd2gSEOij
H6CO+3O+oQqgKHdDvgGrE5vAqRfxBZI9UErOEBUcPOY+Qdp0s5Wg657WuJR1sSDK
iNwho1AS2ZuQHqxVDaDToBCTIwliDVkT0+eIgq5tGZaHBh0/iOUEzjnODcaR36a/
VFPPTTFmkeX9Y0qzyWx/eVASBNguKo6/8/h9PV0zIFkunaE28rDvR2F9x4QSfBaV
737iivHmVxe+/dQ3EwLymrVu1LMwporEqctWUFzUVHsSZfJH7lCErzCs5qPNCoOw
OqqHJXmk+FtYix3GMj+sGSD3qR83ml031EeCxpmHQ4OVNfTTIodF/po9K9NRkM8K
4rA9EkV5xjgWZFw/38ANvozcUXDbVOKMqhwMAH8hLWvIDzO4HfPY/hpRpXzTc+vo
c7QowH+SP/8lXWGEVvFNjDWaowC7ajkAq94RFXQLTucySP9jgaDDD9nK2onMPD2S
Z2t7QXgdu9zuLziWeigriSIsjQIJ7gCfAHpUAaeX9VDocgzTqOoweYFTQuU89S9S
FrfE/B3k+ZI+RDwvsbAShzmMxoYSpct5fhwjA+6D0L1v7piU0GSAT5wMGYFumC32
BQWi41I2o5ory3rOOfzFa5GUxBEG8dJNjIgJKvcMT/2QH0zinY6c03a1wN+V7iRV
i1YqBUUvHCEnbsNHrxmN
=Bu7H
-----END PGP SIGNATURE-----
Merge tag 'phy-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes:
phy: for 4.5
*) new PHY driver for hi6220 usb and rcar gen3 usb2
*) deprecate phy-omap-control driver. phy-omap-control driver was added
when there was no proper infrastructure for doing control module
initialization. The phy-omap-control driver is not an 'actual' PHY
driver and it was just a hack to do PHY related control module
initialization. Now with SYSCON framework in the kernel, control
module setttings can be done using APIs provided by syscon.
*) usbphy-internal pll creates the needed 480MHz and is also a
supply-clock back to the core clock-controller in Rockchip SoCs.
This is now modeled as a real clock.
*) calibrate mt65xx usb3 PHY for better eye diagram and receiver
sensitivity.
*) Miscellaneous cleanups.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
|
||
|---|---|---|
| .. | ||
| Kconfig | ||
| Makefile | ||
| phy-armada375-usb2.c | ||
| phy-bcm-cygnus-pcie.c | ||
| phy-bcm-kona-usb2.c | ||
| phy-berlin-sata.c | ||
| phy-berlin-usb.c | ||
| phy-brcmstb-sata.c | ||
| phy-core.c | ||
| phy-dm816x-usb.c | ||
| phy-exynos4x12-usb2.c | ||
| phy-exynos5-usbdrd.c | ||
| phy-exynos4210-usb2.c | ||
| phy-exynos5250-sata.c | ||
| phy-exynos5250-usb2.c | ||
| phy-exynos-dp-video.c | ||
| phy-exynos-mipi-video.c | ||
| phy-hi6220-usb.c | ||
| phy-hix5hd2-sata.c | ||
| phy-lpc18xx-usb-otg.c | ||
| phy-miphy28lp.c | ||
| phy-miphy365x.c | ||
| phy-mt65xx-usb3.c | ||
| phy-mvebu-sata.c | ||
| phy-omap-control.c | ||
| phy-omap-usb2.c | ||
| phy-pistachio-usb.c | ||
| phy-pxa-28nm-hsic.c | ||
| phy-pxa-28nm-usb2.c | ||
| phy-qcom-apq8064-sata.c | ||
| phy-qcom-ipq806x-sata.c | ||
| phy-qcom-ufs-i.h | ||
| phy-qcom-ufs-qmp-14nm.c | ||
| phy-qcom-ufs-qmp-14nm.h | ||
| phy-qcom-ufs-qmp-20nm.c | ||
| phy-qcom-ufs-qmp-20nm.h | ||
| phy-qcom-ufs.c | ||
| phy-rcar-gen2.c | ||
| phy-rcar-gen3-usb2.c | ||
| phy-rockchip-usb.c | ||
| phy-s5pv210-usb2.c | ||
| phy-samsung-usb2.c | ||
| phy-samsung-usb2.h | ||
| phy-spear1310-miphy.c | ||
| phy-spear1340-miphy.c | ||
| phy-stih41x-usb.c | ||
| phy-stih407-usb.c | ||
| phy-sun4i-usb.c | ||
| phy-sun9i-usb.c | ||
| phy-ti-pipe3.c | ||
| phy-tusb1210.c | ||
| phy-twl4030-usb.c | ||
| phy-xgene.c | ||
| ulpi_phy.h | ||