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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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3f68be7d8e
The Amlogic Meson GXBB/GXL/GXM SoCs embeds a Synopsys DesignWare HDMI TX Controller with a custom Bridge + PHY around the Controller. This driver makes uses of all the custom PHY plat data callbacks and enables the compatible HDMI modes to be configured as a drm_encoder instance. Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
63 lines
1.6 KiB
C
63 lines
1.6 KiB
C
/*
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* Copyright (C) 2016 BayLibre, SAS
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MESON_DRV_H
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#define __MESON_DRV_H
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/of.h>
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#include <drm/drmP.h>
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struct meson_drm {
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struct device *dev;
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void __iomem *io_base;
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struct regmap *hhi;
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struct regmap *dmc;
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int vsync_irq;
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struct drm_device *drm;
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struct drm_crtc *crtc;
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struct drm_fbdev_cma *fbdev;
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struct drm_plane *primary_plane;
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/* Components Data */
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struct {
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bool osd1_enabled;
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bool osd1_interlace;
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bool osd1_commit;
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uint32_t osd1_ctrl_stat;
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uint32_t osd1_blk0_cfg[5];
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} viu;
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struct {
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unsigned int current_mode;
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bool hdmi_repeat;
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bool venc_repeat;
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bool hdmi_use_enci;
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} venc;
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};
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static inline int meson_vpu_is_compatible(struct meson_drm *priv,
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const char *compat)
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{
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return of_device_is_compatible(priv->dev->of_node, compat);
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}
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#endif /* __MESON_DRV_H */
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