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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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49a3b3cbdf
Instead of directly using the cache mode bits in the pte switch to using the cache mode type. This requires to change io_reserve_memtype() as well. Based-on-patch-by: Stefan Bader <stefan.bader@canonical.com> Signed-off-by: Juergen Gross <jgross@suse.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: stefan.bader@canonical.com Cc: xen-devel@lists.xensource.com Cc: konrad.wilk@oracle.com Cc: ville.syrjala@linux.intel.com Cc: david.vrabel@citrix.com Cc: jbeulich@suse.com Cc: toshi.kani@hp.com Cc: plagnioj@jcrosoft.com Cc: tomi.valkeinen@ti.com Cc: bhelgaas@google.com Link: http://lkml.kernel.org/r/1415019724-4317-9-git-send-email-jgross@suse.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
122 lines
3.4 KiB
C
122 lines
3.4 KiB
C
/*
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* Copyright © 2008 Ingo Molnar
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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*/
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#include <asm/iomap.h>
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#include <asm/pat.h>
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#include <linux/module.h>
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#include <linux/highmem.h>
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static int is_io_mapping_possible(resource_size_t base, unsigned long size)
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{
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#if !defined(CONFIG_X86_PAE) && defined(CONFIG_PHYS_ADDR_T_64BIT)
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/* There is no way to map greater than 1 << 32 address without PAE */
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if (base + size > 0x100000000ULL)
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return 0;
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#endif
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return 1;
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}
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int iomap_create_wc(resource_size_t base, unsigned long size, pgprot_t *prot)
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{
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enum page_cache_mode pcm = _PAGE_CACHE_MODE_WC;
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int ret;
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if (!is_io_mapping_possible(base, size))
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return -EINVAL;
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ret = io_reserve_memtype(base, base + size, &pcm);
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if (ret)
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return ret;
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*prot = __pgprot(__PAGE_KERNEL | cachemode2protval(pcm));
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return 0;
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}
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EXPORT_SYMBOL_GPL(iomap_create_wc);
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void iomap_free(resource_size_t base, unsigned long size)
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{
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io_free_memtype(base, base + size);
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}
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EXPORT_SYMBOL_GPL(iomap_free);
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void *kmap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot)
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{
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unsigned long vaddr;
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int idx, type;
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pagefault_disable();
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type = kmap_atomic_idx_push();
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idx = type + KM_TYPE_NR * smp_processor_id();
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vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
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set_pte(kmap_pte - idx, pfn_pte(pfn, prot));
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arch_flush_lazy_mmu_mode();
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return (void *)vaddr;
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}
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/*
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* Map 'pfn' using protections 'prot'
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*/
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void __iomem *
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iomap_atomic_prot_pfn(unsigned long pfn, pgprot_t prot)
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{
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/*
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* For non-PAT systems, promote PAGE_KERNEL_WC to PAGE_KERNEL_UC_MINUS.
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* PAGE_KERNEL_WC maps to PWT, which translates to uncached if the
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* MTRR is UC or WC. UC_MINUS gets the real intention, of the
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* user, which is "WC if the MTRR is WC, UC if you can't do that."
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*/
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if (!pat_enabled && pgprot_val(prot) ==
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(__PAGE_KERNEL | cachemode2protval(_PAGE_CACHE_MODE_WC)))
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prot = __pgprot(__PAGE_KERNEL |
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cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS));
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return (void __force __iomem *) kmap_atomic_prot_pfn(pfn, prot);
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}
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EXPORT_SYMBOL_GPL(iomap_atomic_prot_pfn);
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void
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iounmap_atomic(void __iomem *kvaddr)
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{
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unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
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if (vaddr >= __fix_to_virt(FIX_KMAP_END) &&
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vaddr <= __fix_to_virt(FIX_KMAP_BEGIN)) {
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int idx, type;
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type = kmap_atomic_idx();
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idx = type + KM_TYPE_NR * smp_processor_id();
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#ifdef CONFIG_DEBUG_HIGHMEM
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WARN_ON_ONCE(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
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#endif
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/*
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* Force other mappings to Oops if they'll try to access this
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* pte without first remap it. Keeping stale mappings around
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* is a bad idea also, in case the page changes cacheability
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* attributes or becomes a protected page in a hypervisor.
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*/
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kpte_clear_flush(kmap_pte-idx, vaddr);
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kmap_atomic_idx_pop();
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}
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pagefault_enable();
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}
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EXPORT_SYMBOL_GPL(iounmap_atomic);
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