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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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60dee3ca27
Add bit masking to read ApmTdpLimit precisely Signed-off-by: Gioh Kim <gi-oh.kim@profitbricks.com> Acked-by: Borislav Petkov <bp@suse.de> Acked-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
324 lines
8.6 KiB
C
324 lines
8.6 KiB
C
/*
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* fam15h_power.c - AMD Family 15h processor power monitoring
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*
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* Copyright (c) 2011 Advanced Micro Devices, Inc.
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* Author: Andreas Herrmann <herrmann.der.user@googlemail.com>
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*
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*
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* This driver is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this driver; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/err.h>
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#include <linux/hwmon.h>
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#include <linux/hwmon-sysfs.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/bitops.h>
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#include <asm/processor.h>
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#include <asm/msr.h>
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MODULE_DESCRIPTION("AMD Family 15h CPU processor power monitor");
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MODULE_AUTHOR("Andreas Herrmann <herrmann.der.user@googlemail.com>");
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MODULE_LICENSE("GPL");
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/* D18F3 */
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#define REG_NORTHBRIDGE_CAP 0xe8
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/* D18F4 */
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#define REG_PROCESSOR_TDP 0x1b8
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/* D18F5 */
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#define REG_TDP_RUNNING_AVERAGE 0xe0
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#define REG_TDP_LIMIT3 0xe8
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#define FAM15H_MIN_NUM_ATTRS 2
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#define FAM15H_NUM_GROUPS 2
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#define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b
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#define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4
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struct fam15h_power_data {
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struct pci_dev *pdev;
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unsigned int tdp_to_watts;
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unsigned int base_tdp;
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unsigned int processor_pwr_watts;
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unsigned int cpu_pwr_sample_ratio;
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const struct attribute_group *groups[FAM15H_NUM_GROUPS];
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struct attribute_group group;
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/* maximum accumulated power of a compute unit */
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u64 max_cu_acc_power;
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};
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static ssize_t show_power(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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u32 val, tdp_limit, running_avg_range;
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s32 running_avg_capture;
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u64 curr_pwr_watts;
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struct fam15h_power_data *data = dev_get_drvdata(dev);
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struct pci_dev *f4 = data->pdev;
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pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
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REG_TDP_RUNNING_AVERAGE, &val);
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/*
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* On Carrizo and later platforms, TdpRunAvgAccCap bit field
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* is extended to 4:31 from 4:25.
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*/
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if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60) {
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running_avg_capture = val >> 4;
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running_avg_capture = sign_extend32(running_avg_capture, 27);
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} else {
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running_avg_capture = (val >> 4) & 0x3fffff;
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running_avg_capture = sign_extend32(running_avg_capture, 21);
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}
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running_avg_range = (val & 0xf) + 1;
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pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
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REG_TDP_LIMIT3, &val);
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/*
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* On Carrizo and later platforms, ApmTdpLimit bit field
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* is extended to 16:31 from 16:28.
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*/
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if (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model >= 0x60)
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tdp_limit = val >> 16;
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else
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tdp_limit = (val >> 16) & 0x1fff;
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curr_pwr_watts = ((u64)(tdp_limit +
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data->base_tdp)) << running_avg_range;
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curr_pwr_watts -= running_avg_capture;
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curr_pwr_watts *= data->tdp_to_watts;
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/*
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* Convert to microWatt
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*
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* power is in Watt provided as fixed point integer with
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* scaling factor 1/(2^16). For conversion we use
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* (10^6)/(2^16) = 15625/(2^10)
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*/
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curr_pwr_watts = (curr_pwr_watts * 15625) >> (10 + running_avg_range);
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return sprintf(buf, "%u\n", (unsigned int) curr_pwr_watts);
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}
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static DEVICE_ATTR(power1_input, S_IRUGO, show_power, NULL);
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static ssize_t show_power_crit(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct fam15h_power_data *data = dev_get_drvdata(dev);
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return sprintf(buf, "%u\n", data->processor_pwr_watts);
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}
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static DEVICE_ATTR(power1_crit, S_IRUGO, show_power_crit, NULL);
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static int fam15h_power_init_attrs(struct pci_dev *pdev,
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struct fam15h_power_data *data)
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{
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int n = FAM15H_MIN_NUM_ATTRS;
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struct attribute **fam15h_power_attrs;
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struct cpuinfo_x86 *c = &boot_cpu_data;
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if (c->x86 == 0x15 &&
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(c->x86_model <= 0xf ||
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(c->x86_model >= 0x60 && c->x86_model <= 0x7f)))
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n += 1;
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fam15h_power_attrs = devm_kcalloc(&pdev->dev, n,
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sizeof(*fam15h_power_attrs),
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GFP_KERNEL);
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if (!fam15h_power_attrs)
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return -ENOMEM;
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n = 0;
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fam15h_power_attrs[n++] = &dev_attr_power1_crit.attr;
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if (c->x86 == 0x15 &&
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(c->x86_model <= 0xf ||
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(c->x86_model >= 0x60 && c->x86_model <= 0x7f)))
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fam15h_power_attrs[n++] = &dev_attr_power1_input.attr;
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data->group.attrs = fam15h_power_attrs;
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return 0;
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}
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static bool should_load_on_this_node(struct pci_dev *f4)
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{
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u32 val;
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pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3),
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REG_NORTHBRIDGE_CAP, &val);
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if ((val & BIT(29)) && ((val >> 30) & 3))
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return false;
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return true;
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}
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/*
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* Newer BKDG versions have an updated recommendation on how to properly
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* initialize the running average range (was: 0xE, now: 0x9). This avoids
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* counter saturations resulting in bogus power readings.
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* We correct this value ourselves to cope with older BIOSes.
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*/
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static const struct pci_device_id affected_device[] = {
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
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{ 0 }
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};
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static void tweak_runavg_range(struct pci_dev *pdev)
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{
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u32 val;
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/*
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* let this quirk apply only to the current version of the
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* northbridge, since future versions may change the behavior
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*/
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if (!pci_match_id(affected_device, pdev))
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return;
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pci_bus_read_config_dword(pdev->bus,
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PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
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REG_TDP_RUNNING_AVERAGE, &val);
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if ((val & 0xf) != 0xe)
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return;
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val &= ~0xf;
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val |= 0x9;
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pci_bus_write_config_dword(pdev->bus,
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PCI_DEVFN(PCI_SLOT(pdev->devfn), 5),
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REG_TDP_RUNNING_AVERAGE, val);
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}
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#ifdef CONFIG_PM
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static int fam15h_power_resume(struct pci_dev *pdev)
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{
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tweak_runavg_range(pdev);
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return 0;
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}
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#else
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#define fam15h_power_resume NULL
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#endif
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static int fam15h_power_init_data(struct pci_dev *f4,
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struct fam15h_power_data *data)
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{
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u32 val, eax, ebx, ecx, edx;
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u64 tmp;
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int ret;
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pci_read_config_dword(f4, REG_PROCESSOR_TDP, &val);
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data->base_tdp = val >> 16;
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tmp = val & 0xffff;
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pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5),
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REG_TDP_LIMIT3, &val);
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data->tdp_to_watts = ((val & 0x3ff) << 6) | ((val >> 10) & 0x3f);
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tmp *= data->tdp_to_watts;
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/* result not allowed to be >= 256W */
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if ((tmp >> 16) >= 256)
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dev_warn(&f4->dev,
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"Bogus value for ProcessorPwrWatts (processor_pwr_watts>=%u)\n",
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(unsigned int) (tmp >> 16));
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/* convert to microWatt */
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data->processor_pwr_watts = (tmp * 15625) >> 10;
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ret = fam15h_power_init_attrs(f4, data);
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if (ret)
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return ret;
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cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
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/* CPUID Fn8000_0007:EDX[12] indicates to support accumulated power */
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if (!(edx & BIT(12)))
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return 0;
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/*
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* determine the ratio of the compute unit power accumulator
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* sample period to the PTSC counter period by executing CPUID
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* Fn8000_0007:ECX
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*/
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data->cpu_pwr_sample_ratio = ecx;
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if (rdmsrl_safe(MSR_F15H_CU_MAX_PWR_ACCUMULATOR, &tmp)) {
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pr_err("Failed to read max compute unit power accumulator MSR\n");
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return -ENODEV;
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}
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data->max_cu_acc_power = tmp;
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return 0;
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}
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static int fam15h_power_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct fam15h_power_data *data;
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struct device *dev = &pdev->dev;
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struct device *hwmon_dev;
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int ret;
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/*
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* though we ignore every other northbridge, we still have to
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* do the tweaking on _each_ node in MCM processors as the counters
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* are working hand-in-hand
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*/
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tweak_runavg_range(pdev);
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if (!should_load_on_this_node(pdev))
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return -ENODEV;
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data = devm_kzalloc(dev, sizeof(struct fam15h_power_data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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ret = fam15h_power_init_data(pdev, data);
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if (ret)
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return ret;
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data->pdev = pdev;
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data->groups[0] = &data->group;
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hwmon_dev = devm_hwmon_device_register_with_groups(dev, "fam15h_power",
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data,
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&data->groups[0]);
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return PTR_ERR_OR_ZERO(hwmon_dev);
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}
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static const struct pci_device_id fam15h_power_id_table[] = {
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M60H_NB_F4) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_15H_M70H_NB_F4) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_16H_M30H_NB_F4) },
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{}
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};
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MODULE_DEVICE_TABLE(pci, fam15h_power_id_table);
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static struct pci_driver fam15h_power_driver = {
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.name = "fam15h_power",
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.id_table = fam15h_power_id_table,
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.probe = fam15h_power_probe,
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.resume = fam15h_power_resume,
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};
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module_pci_driver(fam15h_power_driver);
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