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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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df96401649
Currently the driver assumes the register configuration value is identical to its index in the parent map. This patch adds the parent map field in regmap mux clock node which contains the mapping of parent index with actual register configuration value. If regmap node contains this parent map then the configuration value will be taken from this parent map instead of simply writing the index value. Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
66 lines
1.8 KiB
C
66 lines
1.8 KiB
C
/*
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* Copyright (c) 2014, The Linux Foundation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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#include <linux/regmap.h>
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#include <linux/export.h>
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#include "clk-regmap-mux.h"
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static inline struct clk_regmap_mux *to_clk_regmap_mux(struct clk_hw *hw)
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{
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return container_of(to_clk_regmap(hw), struct clk_regmap_mux, clkr);
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}
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static u8 mux_get_parent(struct clk_hw *hw)
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{
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struct clk_regmap_mux *mux = to_clk_regmap_mux(hw);
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struct clk_regmap *clkr = to_clk_regmap(hw);
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unsigned int mask = GENMASK(mux->width - 1, 0);
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unsigned int val;
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regmap_read(clkr->regmap, mux->reg, &val);
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val >>= mux->shift;
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val &= mask;
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if (mux->parent_map)
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return qcom_find_src_index(hw, mux->parent_map, val);
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return val;
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}
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static int mux_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_regmap_mux *mux = to_clk_regmap_mux(hw);
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struct clk_regmap *clkr = to_clk_regmap(hw);
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unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift);
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unsigned int val;
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if (mux->parent_map)
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index = mux->parent_map[index].cfg;
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val = index;
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val <<= mux->shift;
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return regmap_update_bits(clkr->regmap, mux->reg, mask, val);
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}
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const struct clk_ops clk_regmap_mux_closest_ops = {
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.get_parent = mux_get_parent,
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.set_parent = mux_set_parent,
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.determine_rate = __clk_mux_determine_rate_closest,
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};
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EXPORT_SYMBOL_GPL(clk_regmap_mux_closest_ops);
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