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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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59596df640
omap_rng_suspend and omap_rng_resume are unused if CONFIG_PM is enabled but CONFIG_PM_SLEEP is disabled. I found this while building all defconfig files on ARM. It's not clear to me if this is the right solution, but at least it makes the code consistent again. Without this patch, building omap1_defconfig results in: drivers/char/hw_random/omap-rng.c:165:12: warning: 'omap_rng_suspend' defined but not used [-Wunused-function] drivers/char/hw_random/omap-rng.c:171:12: warning: 'omap_rng_resume' defined but not used [-Wunused-function] Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Kevin Hilman <khilman@ti.com> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Herbert Xu <herbert@gondor.apana.org.au>
217 lines
4.6 KiB
C
217 lines
4.6 KiB
C
/*
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* omap-rng.c - RNG driver for TI OMAP CPU family
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*
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* Author: Deepak Saxena <dsaxena@plexity.net>
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*
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* Copyright 2005 (c) MontaVista Software, Inc.
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*
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* Mostly based on original driver:
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*
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* Copyright (C) 2005 Nokia Corporation
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* Author: Juha Yrjölä <juha.yrjola@nokia.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/random.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/hw_random.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <plat/cpu.h>
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#define RNG_OUT_REG 0x00 /* Output register */
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#define RNG_STAT_REG 0x04 /* Status register
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[0] = STAT_BUSY */
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#define RNG_ALARM_REG 0x24 /* Alarm register
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[7:0] = ALARM_COUNTER */
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#define RNG_CONFIG_REG 0x28 /* Configuration register
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[11:6] = RESET_COUNT
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[5:3] = RING2_DELAY
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[2:0] = RING1_DELAY */
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#define RNG_REV_REG 0x3c /* Revision register
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[7:0] = REV_NB */
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#define RNG_MASK_REG 0x40 /* Mask and reset register
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[2] = IT_EN
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[1] = SOFTRESET
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[0] = AUTOIDLE */
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#define RNG_SYSSTATUS 0x44 /* System status
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[0] = RESETDONE */
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static void __iomem *rng_base;
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static struct clk *rng_ick;
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static struct platform_device *rng_dev;
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static inline u32 omap_rng_read_reg(int reg)
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{
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return __raw_readl(rng_base + reg);
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}
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static inline void omap_rng_write_reg(int reg, u32 val)
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{
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__raw_writel(val, rng_base + reg);
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}
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static int omap_rng_data_present(struct hwrng *rng, int wait)
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{
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int data, i;
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for (i = 0; i < 20; i++) {
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data = omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
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if (data || !wait)
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break;
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/* RNG produces data fast enough (2+ MBit/sec, even
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* during "rngtest" loads, that these delays don't
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* seem to trigger. We *could* use the RNG IRQ, but
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* that'd be higher overhead ... so why bother?
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*/
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udelay(10);
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}
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return data;
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}
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static int omap_rng_data_read(struct hwrng *rng, u32 *data)
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{
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*data = omap_rng_read_reg(RNG_OUT_REG);
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return 4;
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}
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static struct hwrng omap_rng_ops = {
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.name = "omap",
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.data_present = omap_rng_data_present,
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.data_read = omap_rng_data_read,
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};
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static int __devinit omap_rng_probe(struct platform_device *pdev)
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{
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struct resource *res;
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int ret;
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/*
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* A bit ugly, and it will never actually happen but there can
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* be only one RNG and this catches any bork
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*/
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if (rng_dev)
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return -EBUSY;
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if (cpu_is_omap24xx()) {
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rng_ick = clk_get(&pdev->dev, "ick");
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if (IS_ERR(rng_ick)) {
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dev_err(&pdev->dev, "Could not get rng_ick\n");
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ret = PTR_ERR(rng_ick);
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return ret;
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} else
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clk_enable(rng_ick);
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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rng_base = devm_request_and_ioremap(&pdev->dev, res);
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if (!rng_base) {
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ret = -ENOMEM;
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goto err_ioremap;
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}
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dev_set_drvdata(&pdev->dev, res);
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ret = hwrng_register(&omap_rng_ops);
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if (ret)
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goto err_register;
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dev_info(&pdev->dev, "OMAP Random Number Generator ver. %02x\n",
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omap_rng_read_reg(RNG_REV_REG));
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omap_rng_write_reg(RNG_MASK_REG, 0x1);
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rng_dev = pdev;
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return 0;
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err_register:
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rng_base = NULL;
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err_ioremap:
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if (cpu_is_omap24xx()) {
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clk_disable(rng_ick);
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clk_put(rng_ick);
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}
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return ret;
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}
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static int __exit omap_rng_remove(struct platform_device *pdev)
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{
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hwrng_unregister(&omap_rng_ops);
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omap_rng_write_reg(RNG_MASK_REG, 0x0);
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if (cpu_is_omap24xx()) {
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clk_disable(rng_ick);
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clk_put(rng_ick);
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}
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rng_base = NULL;
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int omap_rng_suspend(struct device *dev)
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{
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omap_rng_write_reg(RNG_MASK_REG, 0x0);
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return 0;
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}
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static int omap_rng_resume(struct device *dev)
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{
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omap_rng_write_reg(RNG_MASK_REG, 0x1);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(omap_rng_pm, omap_rng_suspend, omap_rng_resume);
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#define OMAP_RNG_PM (&omap_rng_pm)
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#else
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#define OMAP_RNG_PM NULL
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#endif
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/* work with hotplug and coldplug */
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MODULE_ALIAS("platform:omap_rng");
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static struct platform_driver omap_rng_driver = {
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.driver = {
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.name = "omap_rng",
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.owner = THIS_MODULE,
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.pm = OMAP_RNG_PM,
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},
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.probe = omap_rng_probe,
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.remove = __exit_p(omap_rng_remove),
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};
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static int __init omap_rng_init(void)
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{
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if (!cpu_is_omap16xx() && !cpu_is_omap24xx())
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return -ENODEV;
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return platform_driver_register(&omap_rng_driver);
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}
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static void __exit omap_rng_exit(void)
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{
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platform_driver_unregister(&omap_rng_driver);
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}
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module_init(omap_rng_init);
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module_exit(omap_rng_exit);
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MODULE_AUTHOR("Deepak Saxena (and others)");
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MODULE_LICENSE("GPL");
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