Jiange Zhao b05b69036f drm/amdgpu: For Navi12 SRIOV VF, register mailbox functions ... Mailbox functions and interrupts are only for Navi12 VF. Register functions and irqs during initialization. Reviewed-by: Emily Deng <Emily.Deng@amd.com> Signed-off-by: Jiange Zhao <Jiange.Zhao@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-09-16 10:15:20 -05:00
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acp	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
amdgpu	drm/amdgpu: For Navi12 SRIOV VF, register mailbox functions	2019-09-16 10:15:20 -05:00
amdkfd	drm/amdkfd: fix the missed asic name while inited renoir_device_info	2019-09-16 10:06:54 -05:00
display	drm/amd/display: Implement voltage limitation for dali	2019-09-16 10:06:48 -05:00
include	drm/amdgpu: add pcie bif ras related registers	2019-09-16 10:09:37 -05:00
powerplay	drm/amd/powerplay: check SMU engine readiness before proceeding on S3 resume	2019-09-16 10:11:17 -05:00