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0c09d48564
Arm v8 architecture supports multiple page sizes - 4k, 16k and 64k. Based on the active page size, the Linux port supports corresponding hugepage sizes at PMD and PUD(4k only) levels. In addition, the architecture also supports caching larger sized ranges (composed of multiple entries) at the PTE and PMD level in the TLBs using the contiguous bit. The Linux port makes use of this architectural support to enable additional hugepage sizes. Describe the two different types of hugepages supported by the arm64 kernel and the hugepage sizes enabled by each. Acked-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Jonathan Corbet <corbet@lwn.net> Signed-off-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| .. | ||
| acpi_object_usage.txt | ||
| arm-acpi.txt | ||
| booting.txt | ||
| cpu-feature-registers.txt | ||
| elf_hwcaps.txt | ||
| hugetlbpage.txt | ||
| legacy_instructions.txt | ||
| memory.txt | ||
| silicon-errata.txt | ||
| sve.txt | ||
| tagged-pointers.txt | ||