mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 04:35:20 +07:00
e6401c1309
Currently, the IRQ stack is hardcoded as the first page of the percpu area, and the stack canary lives on the IRQ stack. The former gets in the way of adding an IRQ stack guard page, and the latter is a potential weakness in the stack canary mechanism. Split the IRQ stack into its own private percpu pages. [ tglx: Make 64 and 32 bit share struct irq_stack ] Signed-off-by: Andy Lutomirski <luto@kernel.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: Alexey Dobriyan <adobriyan@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: "Chang S. Bae" <chang.seok.bae@intel.com> Cc: Dominik Brodowski <linux@dominikbrodowski.net> Cc: Feng Tang <feng.tang@intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jan Beulich <JBeulich@suse.com> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Joerg Roedel <jroedel@suse.de> Cc: Jordan Borgner <mail@jordan-borgner.de> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Juergen Gross <jgross@suse.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Maran Wilson <maran.wilson@oracle.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Michal Hocko <mhocko@suse.com> Cc: Mike Rapoport <rppt@linux.vnet.ibm.com> Cc: Nick Desaulniers <ndesaulniers@google.com> Cc: Nicolai Stange <nstange@suse.de> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Pu Wen <puwen@hygon.cn> Cc: "Rafael Ávila de Espíndola" <rafael@espindo.la> Cc: Sean Christopherson <sean.j.christopherson@intel.com> Cc: Stefano Stabellini <sstabellini@kernel.org> Cc: Vlastimil Babka <vbabka@suse.cz> Cc: x86-ml <x86@kernel.org> Cc: xen-devel@lists.xenproject.org Link: https://lkml.kernel.org/r/20190414160146.267376656@linutronix.de
126 lines
3.9 KiB
C
126 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* GCC stack protector support.
|
|
*
|
|
* Stack protector works by putting predefined pattern at the start of
|
|
* the stack frame and verifying that it hasn't been overwritten when
|
|
* returning from the function. The pattern is called stack canary
|
|
* and unfortunately gcc requires it to be at a fixed offset from %gs.
|
|
* On x86_64, the offset is 40 bytes and on x86_32 20 bytes. x86_64
|
|
* and x86_32 use segment registers differently and thus handles this
|
|
* requirement differently.
|
|
*
|
|
* On x86_64, %gs is shared by percpu area and stack canary. All
|
|
* percpu symbols are zero based and %gs points to the base of percpu
|
|
* area. The first occupant of the percpu area is always
|
|
* fixed_percpu_data which contains stack_canary at offset 40. Userland
|
|
* %gs is always saved and restored on kernel entry and exit using
|
|
* swapgs, so stack protector doesn't add any complexity there.
|
|
*
|
|
* On x86_32, it's slightly more complicated. As in x86_64, %gs is
|
|
* used for userland TLS. Unfortunately, some processors are much
|
|
* slower at loading segment registers with different value when
|
|
* entering and leaving the kernel, so the kernel uses %fs for percpu
|
|
* area and manages %gs lazily so that %gs is switched only when
|
|
* necessary, usually during task switch.
|
|
*
|
|
* As gcc requires the stack canary at %gs:20, %gs can't be managed
|
|
* lazily if stack protector is enabled, so the kernel saves and
|
|
* restores userland %gs on kernel entry and exit. This behavior is
|
|
* controlled by CONFIG_X86_32_LAZY_GS and accessors are defined in
|
|
* system.h to hide the details.
|
|
*/
|
|
|
|
#ifndef _ASM_STACKPROTECTOR_H
|
|
#define _ASM_STACKPROTECTOR_H 1
|
|
|
|
#ifdef CONFIG_STACKPROTECTOR
|
|
|
|
#include <asm/tsc.h>
|
|
#include <asm/processor.h>
|
|
#include <asm/percpu.h>
|
|
#include <asm/desc.h>
|
|
|
|
#include <linux/random.h>
|
|
#include <linux/sched.h>
|
|
|
|
/*
|
|
* 24 byte read-only segment initializer for stack canary. Linker
|
|
* can't handle the address bit shifting. Address will be set in
|
|
* head_32 for boot CPU and setup_per_cpu_areas() for others.
|
|
*/
|
|
#define GDT_STACK_CANARY_INIT \
|
|
[GDT_ENTRY_STACK_CANARY] = GDT_ENTRY_INIT(0x4090, 0, 0x18),
|
|
|
|
/*
|
|
* Initialize the stackprotector canary value.
|
|
*
|
|
* NOTE: this must only be called from functions that never return,
|
|
* and it must always be inlined.
|
|
*/
|
|
static __always_inline void boot_init_stack_canary(void)
|
|
{
|
|
u64 canary;
|
|
u64 tsc;
|
|
|
|
#ifdef CONFIG_X86_64
|
|
BUILD_BUG_ON(offsetof(struct fixed_percpu_data, stack_canary) != 40);
|
|
#endif
|
|
/*
|
|
* We both use the random pool and the current TSC as a source
|
|
* of randomness. The TSC only matters for very early init,
|
|
* there it already has some randomness on most systems. Later
|
|
* on during the bootup the random pool has true entropy too.
|
|
*/
|
|
get_random_bytes(&canary, sizeof(canary));
|
|
tsc = rdtsc();
|
|
canary += tsc + (tsc << 32UL);
|
|
canary &= CANARY_MASK;
|
|
|
|
current->stack_canary = canary;
|
|
#ifdef CONFIG_X86_64
|
|
this_cpu_write(fixed_percpu_data.stack_canary, canary);
|
|
#else
|
|
this_cpu_write(stack_canary.canary, canary);
|
|
#endif
|
|
}
|
|
|
|
static inline void setup_stack_canary_segment(int cpu)
|
|
{
|
|
#ifdef CONFIG_X86_32
|
|
unsigned long canary = (unsigned long)&per_cpu(stack_canary, cpu);
|
|
struct desc_struct *gdt_table = get_cpu_gdt_rw(cpu);
|
|
struct desc_struct desc;
|
|
|
|
desc = gdt_table[GDT_ENTRY_STACK_CANARY];
|
|
set_desc_base(&desc, canary);
|
|
write_gdt_entry(gdt_table, GDT_ENTRY_STACK_CANARY, &desc, DESCTYPE_S);
|
|
#endif
|
|
}
|
|
|
|
static inline void load_stack_canary_segment(void)
|
|
{
|
|
#ifdef CONFIG_X86_32
|
|
asm("mov %0, %%gs" : : "r" (__KERNEL_STACK_CANARY) : "memory");
|
|
#endif
|
|
}
|
|
|
|
#else /* STACKPROTECTOR */
|
|
|
|
#define GDT_STACK_CANARY_INIT
|
|
|
|
/* dummy boot_init_stack_canary() is defined in linux/stackprotector.h */
|
|
|
|
static inline void setup_stack_canary_segment(int cpu)
|
|
{ }
|
|
|
|
static inline void load_stack_canary_segment(void)
|
|
{
|
|
#ifdef CONFIG_X86_32
|
|
asm volatile ("mov %0, %%gs" : : "r" (0));
|
|
#endif
|
|
}
|
|
|
|
#endif /* STACKPROTECTOR */
|
|
#endif /* _ASM_STACKPROTECTOR_H */
|