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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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9ec88b60cb
- Add DMA device - Add NAND device - Add GPIO device - Add LED device - Update the defconfig and rename it to loongson1b_defconfig - Fix ioremap size - Other minor fixes Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Vinod Koul <vinod.koul@intel.com> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Richard Weinberger <richard@nod.at> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Brian Norris <computersforpeace@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-clk@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: dmaengine@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: linux-mtd@lists.infradead.org Patchwork: https://patchwork.linux-mips.org/patch/13033/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
52 lines
1.3 KiB
C
52 lines
1.3 KiB
C
/*
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* Copyright (c) 2011 Zhang, Keguang <keguang.zhang@gmail.com>
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*
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* Loongson 1 Clock Register Definitions.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __ASM_MACH_LOONGSON32_REGS_CLK_H
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#define __ASM_MACH_LOONGSON32_REGS_CLK_H
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#define LS1X_CLK_REG(x) \
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((void __iomem *)KSEG1ADDR(LS1X_CLK_BASE + (x)))
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#define LS1X_CLK_PLL_FREQ LS1X_CLK_REG(0x0)
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#define LS1X_CLK_PLL_DIV LS1X_CLK_REG(0x4)
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/* Clock PLL Divisor Register Bits */
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#define DIV_DC_EN BIT(31)
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#define DIV_DC_RST BIT(30)
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#define DIV_CPU_EN BIT(25)
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#define DIV_CPU_RST BIT(24)
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#define DIV_DDR_EN BIT(19)
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#define DIV_DDR_RST BIT(18)
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#define RST_DC_EN BIT(5)
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#define RST_DC BIT(4)
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#define RST_DDR_EN BIT(3)
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#define RST_DDR BIT(2)
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#define RST_CPU_EN BIT(1)
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#define RST_CPU BIT(0)
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#define DIV_DC_SHIFT 26
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#define DIV_CPU_SHIFT 20
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#define DIV_DDR_SHIFT 14
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#define DIV_DC_WIDTH 4
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#define DIV_CPU_WIDTH 4
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#define DIV_DDR_WIDTH 4
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#define BYPASS_DC_SHIFT 12
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#define BYPASS_DDR_SHIFT 10
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#define BYPASS_CPU_SHIFT 8
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#define BYPASS_DC_WIDTH 1
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#define BYPASS_DDR_WIDTH 1
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#define BYPASS_CPU_WIDTH 1
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#endif /* __ASM_MACH_LOONGSON32_REGS_CLK_H */
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