mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-11 23:36:45 +07:00
bb19a7513d
This patch adds the interrupt definitions for EXYNOS5250 at <mach/irqs.h> file and it is needed for EXYNOS5250 SoC. As a note, for single zImage of EXYNOS4 and EXYNOS5, prefix of EXYNOS4_ and EXYNOS5_ has been added. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
104 lines
2.3 KiB
C
104 lines
2.3 KiB
C
/* linux/arch/arm/plat-s5p/irq-pm.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Based on arch/arm/plat-s3c24xx/irq-pm.c,
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* Copyright (c) 2003,2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <plat/cpu.h>
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#include <plat/irqs.h>
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#include <plat/pm.h>
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#include <mach/map.h>
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#include <mach/regs-gpio.h>
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#include <mach/regs-irq.h>
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/* state for IRQs over sleep */
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/* default is to allow for EINT0..EINT31, and IRQ_RTC_TIC, IRQ_RTC_ALARM,
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* as wakeup sources
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*
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* set bit to 1 in allow bitfield to enable the wakeup settings on it
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*/
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unsigned long s3c_irqwake_intallow = 0x00000006L;
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unsigned long s3c_irqwake_eintallow = 0xffffffffL;
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int s3c_irq_wake(struct irq_data *data, unsigned int state)
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{
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unsigned long irqbit;
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unsigned int irq_rtc_tic, irq_rtc_alarm;
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#ifdef CONFIG_ARCH_EXYNOS
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if (soc_is_exynos5250()) {
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irq_rtc_tic = EXYNOS5_IRQ_RTC_TIC;
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irq_rtc_alarm = EXYNOS5_IRQ_RTC_ALARM;
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} else {
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irq_rtc_tic = EXYNOS4_IRQ_RTC_TIC;
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irq_rtc_alarm = EXYNOS4_IRQ_RTC_ALARM;
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}
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#else
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irq_rtc_tic = IRQ_RTC_TIC;
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irq_rtc_alarm = IRQ_RTC_ALARM;
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#endif
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if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) {
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irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);
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if (!state)
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s3c_irqwake_intmask |= irqbit;
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else
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s3c_irqwake_intmask &= ~irqbit;
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} else {
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return -ENOENT;
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}
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return 0;
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}
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static struct sleep_save eint_save[] = {
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SAVE_ITEM(S5P_EINT_CON(0)),
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SAVE_ITEM(S5P_EINT_CON(1)),
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SAVE_ITEM(S5P_EINT_CON(2)),
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SAVE_ITEM(S5P_EINT_CON(3)),
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SAVE_ITEM(S5P_EINT_FLTCON(0)),
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SAVE_ITEM(S5P_EINT_FLTCON(1)),
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SAVE_ITEM(S5P_EINT_FLTCON(2)),
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SAVE_ITEM(S5P_EINT_FLTCON(3)),
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SAVE_ITEM(S5P_EINT_FLTCON(4)),
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SAVE_ITEM(S5P_EINT_FLTCON(5)),
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SAVE_ITEM(S5P_EINT_FLTCON(6)),
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SAVE_ITEM(S5P_EINT_FLTCON(7)),
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SAVE_ITEM(S5P_EINT_MASK(0)),
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SAVE_ITEM(S5P_EINT_MASK(1)),
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SAVE_ITEM(S5P_EINT_MASK(2)),
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SAVE_ITEM(S5P_EINT_MASK(3)),
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};
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int s3c24xx_irq_suspend(void)
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{
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s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));
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return 0;
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}
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void s3c24xx_irq_resume(void)
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{
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s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));
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}
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