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af2ac1a091
My distro kernel (Fedora Rawhide) started throwing warnings from DMA API checker, so I have no choice but band-aid it quick. There's no attempt to reuse DMA buffers. Control messages are only sent rarely anyway. Signed-off-by: Pete Zaitcev <zaitcev@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
457 lines
19 KiB
C
457 lines
19 KiB
C
/*
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* Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver
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*
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* Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This driver is for the device MCT USB-RS232 Converter (25 pin, Model No.
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* U232-P25) from Magic Control Technology Corp. (there is also a 9 pin
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* Model No. U232-P9). See http://www.mct.com.tw/p_u232.html for further
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* information. The properties of this device are listed at the end of this
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* file. This device is available from various distributors. I know Hana,
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* http://www.hana.de and D-Link, http://www.dlink.com/products/usb/dsbs25.
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*
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* All of the information about the device was acquired by using SniffUSB
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* on Windows98. The technical details of the reverse engineering are
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* summarized at the end of this file.
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*/
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#ifndef __LINUX_USB_SERIAL_MCT_U232_H
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#define __LINUX_USB_SERIAL_MCT_U232_H
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#define MCT_U232_VID 0x0711 /* Vendor Id */
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#define MCT_U232_PID 0x0210 /* Original MCT Product Id */
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/* U232-P25, Sitecom */
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#define MCT_U232_SITECOM_PID 0x0230 /* Sitecom Product Id */
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/* DU-H3SP USB BAY hub */
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#define MCT_U232_DU_H3SP_PID 0x0200 /* D-Link DU-H3SP USB BAY */
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/* Belkin badge the MCT U232-P9 as the F5U109 */
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#define MCT_U232_BELKIN_F5U109_VID 0x050d /* Vendor Id */
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#define MCT_U232_BELKIN_F5U109_PID 0x0109 /* Product Id */
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/*
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* Vendor Request Interface
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*/
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#define MCT_U232_SET_REQUEST_TYPE 0x40
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#define MCT_U232_GET_REQUEST_TYPE 0xc0
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#define MCT_U232_GET_MODEM_STAT_REQUEST 2 /* Get Modem Status Register (MSR) */
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#define MCT_U232_GET_MODEM_STAT_SIZE 1
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#define MCT_U232_GET_LINE_CTRL_REQUEST 6 /* Get Line Control Register (LCR) */
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#define MCT_U232_GET_LINE_CTRL_SIZE 1 /* ... not used by this driver */
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#define MCT_U232_SET_BAUD_RATE_REQUEST 5 /* Set Baud Rate Divisor */
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#define MCT_U232_SET_BAUD_RATE_SIZE 4
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#define MCT_U232_SET_LINE_CTRL_REQUEST 7 /* Set Line Control Register (LCR) */
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#define MCT_U232_SET_LINE_CTRL_SIZE 1
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#define MCT_U232_SET_MODEM_CTRL_REQUEST 10 /* Set Modem Control Register (MCR) */
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#define MCT_U232_SET_MODEM_CTRL_SIZE 1
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/* This USB device request code is not well understood. It is transmitted by
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the MCT-supplied Windows driver whenever the baud rate changes.
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*/
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#define MCT_U232_SET_UNKNOWN1_REQUEST 11 /* Unknown functionality */
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#define MCT_U232_SET_UNKNOWN1_SIZE 1
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/* This USB device request code appears to control whether CTS is required
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during transmission.
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Sending a zero byte allows data transmission to a device which is not
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asserting CTS. Sending a '1' byte will cause transmission to be deferred
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until the device asserts CTS.
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*/
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#define MCT_U232_SET_CTS_REQUEST 12
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#define MCT_U232_SET_CTS_SIZE 1
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#define MCT_U232_MAX_SIZE 4 /* of MCT_XXX_SIZE */
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/*
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* Baud rate (divisor)
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* Actually, there are two of them, MCT website calls them "Philips solution"
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* and "Intel solution". They are the regular MCT and "Sitecom" for us.
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* This is pointless to document in the header, see the code for the bits.
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*/
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static int mct_u232_calculate_baud_rate(struct usb_serial *serial, speed_t value, speed_t *result);
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/*
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* Line Control Register (LCR)
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*/
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#define MCT_U232_SET_BREAK 0x40
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#define MCT_U232_PARITY_SPACE 0x38
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#define MCT_U232_PARITY_MARK 0x28
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#define MCT_U232_PARITY_EVEN 0x18
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#define MCT_U232_PARITY_ODD 0x08
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#define MCT_U232_PARITY_NONE 0x00
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#define MCT_U232_DATA_BITS_5 0x00
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#define MCT_U232_DATA_BITS_6 0x01
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#define MCT_U232_DATA_BITS_7 0x02
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#define MCT_U232_DATA_BITS_8 0x03
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#define MCT_U232_STOP_BITS_2 0x04
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#define MCT_U232_STOP_BITS_1 0x00
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/*
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* Modem Control Register (MCR)
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*/
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#define MCT_U232_MCR_NONE 0x8 /* Deactivate DTR and RTS */
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#define MCT_U232_MCR_RTS 0xa /* Activate RTS */
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#define MCT_U232_MCR_DTR 0x9 /* Activate DTR */
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/*
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* Modem Status Register (MSR)
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*/
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#define MCT_U232_MSR_INDEX 0x0 /* data[index] */
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#define MCT_U232_MSR_CD 0x80 /* Current CD */
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#define MCT_U232_MSR_RI 0x40 /* Current RI */
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#define MCT_U232_MSR_DSR 0x20 /* Current DSR */
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#define MCT_U232_MSR_CTS 0x10 /* Current CTS */
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#define MCT_U232_MSR_DCD 0x08 /* Delta CD */
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#define MCT_U232_MSR_DRI 0x04 /* Delta RI */
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#define MCT_U232_MSR_DDSR 0x02 /* Delta DSR */
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#define MCT_U232_MSR_DCTS 0x01 /* Delta CTS */
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/*
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* Line Status Register (LSR)
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*/
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#define MCT_U232_LSR_INDEX 1 /* data[index] */
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#define MCT_U232_LSR_ERR 0x80 /* OE | PE | FE | BI */
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#define MCT_U232_LSR_TEMT 0x40 /* transmit register empty */
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#define MCT_U232_LSR_THRE 0x20 /* transmit holding register empty */
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#define MCT_U232_LSR_BI 0x10 /* break indicator */
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#define MCT_U232_LSR_FE 0x08 /* framing error */
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#define MCT_U232_LSR_OE 0x02 /* overrun error */
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#define MCT_U232_LSR_PE 0x04 /* parity error */
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#define MCT_U232_LSR_OE 0x02 /* overrun error */
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#define MCT_U232_LSR_DR 0x01 /* receive data ready */
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/* -----------------------------------------------------------------------------
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* Technical Specification reverse engineered with SniffUSB on Windows98
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* =====================================================================
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*
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* The technical details of the device have been acquired be using "SniffUSB"
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* and the vendor-supplied device driver (version 2.3A) under Windows98. To
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* identify the USB vendor-specific requests and to assign them to terminal
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* settings (flow control, baud rate, etc.) the program "SerialSettings" from
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* William G. Greathouse has been proven to be very useful. I also used the
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* Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and
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* observations are summarized below:
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*
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* The USB requests seem to be directly mapped to the registers of a 8250,
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* 16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output
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* devices") contains a comprehensive description of UARTs and its registers.
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* The bit descriptions are actually taken from there.
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*
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*
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* Baud rate (divisor)
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* -------------------
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*
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* BmRequestType: 0x40 (0100 0000B)
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* bRequest: 0x05
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* wValue: 0x0000
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* wIndex: 0x0000
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* wLength: 0x0004
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* Data: divisor = 115200 / baud_rate
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*
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* SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4
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* shown above, observations with a Belkin F5U109 adapter, using the
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* MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for
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* Win98/Me"), show this request has a length of 1 byte, presumably because
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* of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter
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* use a baud-rate code instead of a conventional RS-232 baud rate divisor.
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* The current source code for this driver does not reflect this fact, but
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* the driver works fine with this adapter/driver combination nonetheless.
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*
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*
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* Line Control Register (LCR)
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* ---------------------------
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*
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* BmRequestType: 0x40 (0100 0000B) 0xc0 (1100 0000B)
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* bRequest: 0x07 0x06
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* wValue: 0x0000
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* wIndex: 0x0000
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* wLength: 0x0001
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* Data: LCR (see below)
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*
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* Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data
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* transmit/receive register (THR/RBR) and the Interrupt Enable Register
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* (IER) is disabled. Any access to these ports is now redirected to the
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* Divisor Latch Registers. Setting this bit, loading the Divisor
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* Registers, and clearing DLAB should be done with interrupts disabled.
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* Bit 6: Set Break. When set to "1", the transmitter begins to transmit
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* continuous Spacing until this bit is set to "0". This overrides any
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* bits of characters that are being transmitted.
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* Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity
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* to always be "1" or "0", based on the value of Bit 4.
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* Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0",
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* setting this bit causes even parity to be transmitted and expected.
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* Otherwise, odd parity is used.
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* Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted
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* between the last bit of the data and the Stop Bit. The UART will also
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* expect parity to be present in the received data.
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* Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words,
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* 1.5 Stop Bits are transmitted and expected in each data word. For
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* 6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected.
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* When this bit is set to "0", one Stop Bit is used on each data word.
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* Bit 1: Word Length Select Bit #1 (WLSB1)
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* Bit 0: Word Length Select Bit #0 (WLSB0)
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* Together these bits specify the number of bits in each data word.
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* 1 0 Word Length
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* 0 0 5 Data Bits
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* 0 1 6 Data Bits
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* 1 0 7 Data Bits
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* 1 1 8 Data Bits
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*
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* SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs
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* in the Win98 driver: the break does not work (bit 6 is not asserted) and the
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* stick parity bit is not cleared when set once. The LCR can also be read
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* back with USB request 6 but this has never been observed with SniffUSB.
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*
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*
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* Modem Control Register (MCR)
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* ----------------------------
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*
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* BmRequestType: 0x40 (0100 0000B)
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* bRequest: 0x0a
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* wValue: 0x0000
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* wIndex: 0x0000
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* wLength: 0x0001
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* Data: MCR (Bit 4..7, see below)
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*
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* Bit 7: Reserved, always 0.
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* Bit 6: Reserved, always 0.
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* Bit 5: Reserved, always 0.
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* Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver
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* are internally connected together to allow diagnostic operations. In
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* addition, the UART modem control outputs are connected to the UART
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* modem control inputs. CTS is connected to RTS, DTR is connected to
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* DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD.
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* Bit 3: OUT 2. An auxiliary output that the host processor may set high or
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* low. In the IBM PC serial adapter (and most clones), OUT 2 is used
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* to tri-state (disable) the interrupt signal from the
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* 8250/16450/16550 UART.
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* Bit 2: OUT 1. An auxiliary output that the host processor may set high or
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* low. This output is not used on the IBM PC serial adapter.
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* Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS
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* line is Low (Active).
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* Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART
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* -DTR line is Low (Active).
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*
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* SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been
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* seen _always_ set.
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*
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*
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* Modem Status Register (MSR)
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* ---------------------------
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*
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* BmRequestType: 0xc0 (1100 0000B)
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* bRequest: 0x02
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* wValue: 0x0000
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* wIndex: 0x0000
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* wLength: 0x0001
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* Data: MSR (see below)
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*
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* Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the
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* UART.
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* Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART.
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* Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART.
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* Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART.
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* Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has
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* changed state one more more times since the last time the MSR was
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* read by the host.
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* Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has
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* had a low to high transition since the last time the MSR was read by
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* the host.
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* Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed
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* state one more more times since the last time the MSR was read by the
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* host.
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* Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed
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* state one more times since the last time the MSR was read by the
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* host.
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*
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* SniffUSB observations: the MSR is also returned as first byte on the
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* interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB
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* request to read MSR cannot be applied during normal device operation.
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*
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*
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* Line Status Register (LSR)
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* --------------------------
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*
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* Bit 7 Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero.
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* This bit is set to "1" when any of the bytes in the FIFO have one or
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* more of the following error conditions: PE, FE, or BI.
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* Bit 6 Transmitter Empty (TEMT). When set to "1", there are no words
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* remaining in the transmit FIFO or the transmit shift register. The
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* transmitter is completely idle.
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* Bit 5 Transmitter Holding Register Empty (THRE). When set to "1", the FIFO
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* (or holding register) now has room for at least one additional word
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* to transmit. The transmitter may still be transmitting when this bit
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* is set to "1".
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* Bit 4 Break Interrupt (BI). The receiver has detected a Break signal.
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* Bit 3 Framing Error (FE). A Start Bit was detected but the Stop Bit did not
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* appear at the expected time. The received word is probably garbled.
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* Bit 2 Parity Error (PE). The parity bit was incorrect for the word received.
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* Bit 1 Overrun Error (OE). A new word was received and there was no room in
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* the receive buffer. The newly-arrived word in the shift register is
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* discarded. On 8250/16450 UARTs, the word in the holding register is
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* discarded and the newly- arrived word is put in the holding register.
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* Bit 0 Data Ready (DR). One or more words are in the receive FIFO that the
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* host may read. A word must be completely received and moved from the
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* shift register into the FIFO (or holding register for 8250/16450
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* designs) before this bit is set.
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*
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* SniffUSB observations: the LSR is returned as second byte on the interrupt-in
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* endpoint 0x83 to signal error conditions. Such errors have been seen with
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* minicom/zmodem transfers (CRC errors).
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*
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*
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* Unknown #1
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* -------------------
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*
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* BmRequestType: 0x40 (0100 0000B)
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* bRequest: 0x0b
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* wValue: 0x0000
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* wIndex: 0x0000
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* wLength: 0x0001
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* Data: 0x00
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*
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* SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
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* (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
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* occurs immediately after a "Baud rate (divisor)" message. It was not
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* observed at any other time. It is unclear what purpose this message
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* serves.
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*
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*
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* Unknown #2
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* -------------------
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*
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* BmRequestType: 0x40 (0100 0000B)
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* bRequest: 0x0c
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* wValue: 0x0000
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* wIndex: 0x0000
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* wLength: 0x0001
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* Data: 0x00
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*
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* SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
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* (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
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* occurs immediately after the 'Unknown #1' message (see above). It was
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* not observed at any other time. It is unclear what other purpose (if
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* any) this message might serve, but without it, the USB/RS-232 adapter
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* will not write to RS-232 devices which do not assert the 'CTS' signal.
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*
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*
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* Flow control
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* ------------
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*
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* SniffUSB observations: no flow control specific requests have been realized
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* apart from DTR/RTS settings. Both signals are dropped for no flow control
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* but asserted for hardware or software flow control.
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*
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*
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* Endpoint usage
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* --------------
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*
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* SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint
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* 0x81 is used to transmit and receive characters. The second interrupt-in
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* endpoint 0x83 signals exceptional conditions like modem line changes and
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* errors. The first byte returned is the MSR and the second byte the LSR.
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*
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*
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* Other observations
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* ------------------
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*
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* Queued bulk transfers like used in visor.c did not work.
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*
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*
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* Properties of the USB device used (as found in /var/log/messages)
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* -----------------------------------------------------------------
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*
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* Manufacturer: MCT Corporation.
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* Product: USB-232 Interfact Controller
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* SerialNumber: U2S22050
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*
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* Length = 18
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* DescriptorType = 01
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* USB version = 1.00
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* Vendor:Product = 0711:0210
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* MaxPacketSize0 = 8
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* NumConfigurations = 1
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* Device version = 1.02
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* Device Class:SubClass:Protocol = 00:00:00
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* Per-interface classes
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* Configuration:
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* bLength = 9
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* bDescriptorType = 02
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* wTotalLength = 0027
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* bNumInterfaces = 01
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* bConfigurationValue = 01
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* iConfiguration = 00
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* bmAttributes = c0
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* MaxPower = 100mA
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*
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* Interface: 0
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* Alternate Setting: 0
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* bLength = 9
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* bDescriptorType = 04
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* bInterfaceNumber = 00
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* bAlternateSetting = 00
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* bNumEndpoints = 03
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* bInterface Class:SubClass:Protocol = 00:00:00
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* iInterface = 00
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* Endpoint:
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* bLength = 7
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* bDescriptorType = 05
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* bEndpointAddress = 81 (in)
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* bmAttributes = 03 (Interrupt)
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* wMaxPacketSize = 0040
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* bInterval = 02
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* Endpoint:
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* bLength = 7
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* bDescriptorType = 05
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* bEndpointAddress = 01 (out)
|
|
* bmAttributes = 02 (Bulk)
|
|
* wMaxPacketSize = 0040
|
|
* bInterval = 00
|
|
* Endpoint:
|
|
* bLength = 7
|
|
* bDescriptorType = 05
|
|
* bEndpointAddress = 83 (in)
|
|
* bmAttributes = 03 (Interrupt)
|
|
* wMaxPacketSize = 0002
|
|
* bInterval = 02
|
|
*
|
|
*
|
|
* Hardware details (added by Martin Hamilton, 2001/12/06)
|
|
* -----------------------------------------------------------------
|
|
*
|
|
* This info was gleaned from opening a Belkin F5U109 DB9 USB serial
|
|
* adaptor, which turns out to simply be a re-badged U232-P9. We
|
|
* know this because there is a sticky label on the circuit board
|
|
* which says "U232-P9" ;-)
|
|
*
|
|
* The circuit board inside the adaptor contains a Philips PDIUSBD12
|
|
* USB endpoint chip and a Philips P87C52UBAA microcontroller with
|
|
* embedded UART. Exhaustive documentation for these is available at:
|
|
*
|
|
* http://www.semiconductors.philips.com/pip/p87c52ubaa
|
|
* http://www.semiconductors.philips.com/pip/pdiusbd12
|
|
*
|
|
* Thanks to Julian Highfield for the pointer to the Philips database.
|
|
*
|
|
*/
|
|
|
|
#endif /* __LINUX_USB_SERIAL_MCT_U232_H */
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|