mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b77eb35e64
Fix build breakage by the recent statistics cleanup in cset
09f75cd7bf
.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
1140 lines
31 KiB
C
1140 lines
31 KiB
C
/*
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* Copyright (C) 2000, 2005 MIPS Technologies, Inc. All rights reserved.
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* Authors: Carsten Langgaard <carstenl@mips.com>
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* Maciej W. Rozycki <macro@mips.com>
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* Copyright (C) 2004 Ralf Baechle <ralf@linux-mips.org>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* SAA9730 ethernet driver.
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*
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* Changes:
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* Angelo Dell'Aera <buffer@antifork.org> : Conversion to the new PCI API
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* (pci_driver).
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* Conversion to spinlocks.
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* Error handling fixes.
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*/
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#include <linux/init.h>
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#include <linux/netdevice.h>
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#include <linux/delay.h>
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#include <linux/etherdevice.h>
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#include <linux/module.h>
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#include <linux/skbuff.h>
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#include <linux/pci.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <asm/addrspace.h>
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#include <asm/io.h>
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#include <asm/mips-boards/prom.h>
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#include "saa9730.h"
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#ifdef LAN_SAA9730_DEBUG
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int lan_saa9730_debug = LAN_SAA9730_DEBUG;
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#else
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int lan_saa9730_debug;
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#endif
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#define DRV_MODULE_NAME "saa9730"
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static struct pci_device_id saa9730_pci_tbl[] = {
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{ PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA9730,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, saa9730_pci_tbl);
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/* Non-zero only if the current card is a PCI with BIOS-set IRQ. */
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static unsigned int pci_irq_line;
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static void evm_saa9730_enable_lan_int(struct lan_saa9730_private *lp)
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{
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writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
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&lp->evm_saa9730_regs->InterruptBlock1);
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writel(readl(&lp->evm_saa9730_regs->InterruptStatus1) | EVM_LAN_INT,
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&lp->evm_saa9730_regs->InterruptStatus1);
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writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) | EVM_LAN_INT |
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EVM_MASTER_EN, &lp->evm_saa9730_regs->InterruptEnable1);
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}
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static void evm_saa9730_disable_lan_int(struct lan_saa9730_private *lp)
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{
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writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
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&lp->evm_saa9730_regs->InterruptBlock1);
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writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) & ~EVM_LAN_INT,
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&lp->evm_saa9730_regs->InterruptEnable1);
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}
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static void evm_saa9730_clear_lan_int(struct lan_saa9730_private *lp)
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{
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writel(EVM_LAN_INT, &lp->evm_saa9730_regs->InterruptStatus1);
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}
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static void evm_saa9730_block_lan_int(struct lan_saa9730_private *lp)
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{
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writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT,
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&lp->evm_saa9730_regs->InterruptBlock1);
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}
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static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private *lp)
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{
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writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT,
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&lp->evm_saa9730_regs->InterruptBlock1);
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}
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static void __used show_saa9730_regs(struct net_device *dev)
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{
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struct lan_saa9730_private *lp = netdev_priv(dev);
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int i, j;
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printk("TxmBufferA = %p\n", lp->TxmBuffer[0][0]);
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printk("TxmBufferB = %p\n", lp->TxmBuffer[1][0]);
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printk("RcvBufferA = %p\n", lp->RcvBuffer[0][0]);
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printk("RcvBufferB = %p\n", lp->RcvBuffer[1][0]);
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for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
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for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
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printk("TxmBuffer[%d][%d] = %x\n", i, j,
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le32_to_cpu(*(unsigned int *)
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lp->TxmBuffer[i][j]));
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}
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}
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for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
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for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
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printk("RcvBuffer[%d][%d] = %x\n", i, j,
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le32_to_cpu(*(unsigned int *)
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lp->RcvBuffer[i][j]));
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}
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}
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printk("lp->evm_saa9730_regs->InterruptBlock1 = %x\n",
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readl(&lp->evm_saa9730_regs->InterruptBlock1));
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printk("lp->evm_saa9730_regs->InterruptStatus1 = %x\n",
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readl(&lp->evm_saa9730_regs->InterruptStatus1));
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printk("lp->evm_saa9730_regs->InterruptEnable1 = %x\n",
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readl(&lp->evm_saa9730_regs->InterruptEnable1));
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printk("lp->lan_saa9730_regs->Ok2Use = %x\n",
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readl(&lp->lan_saa9730_regs->Ok2Use));
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printk("lp->NextTxmBufferIndex = %x\n", lp->NextTxmBufferIndex);
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printk("lp->NextTxmPacketIndex = %x\n", lp->NextTxmPacketIndex);
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printk("lp->PendingTxmBufferIndex = %x\n",
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lp->PendingTxmBufferIndex);
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printk("lp->PendingTxmPacketIndex = %x\n",
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lp->PendingTxmPacketIndex);
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printk("lp->lan_saa9730_regs->LanDmaCtl = %x\n",
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readl(&lp->lan_saa9730_regs->LanDmaCtl));
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printk("lp->lan_saa9730_regs->DmaStatus = %x\n",
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readl(&lp->lan_saa9730_regs->DmaStatus));
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printk("lp->lan_saa9730_regs->CamCtl = %x\n",
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readl(&lp->lan_saa9730_regs->CamCtl));
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printk("lp->lan_saa9730_regs->TxCtl = %x\n",
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readl(&lp->lan_saa9730_regs->TxCtl));
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printk("lp->lan_saa9730_regs->TxStatus = %x\n",
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readl(&lp->lan_saa9730_regs->TxStatus));
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printk("lp->lan_saa9730_regs->RxCtl = %x\n",
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readl(&lp->lan_saa9730_regs->RxCtl));
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printk("lp->lan_saa9730_regs->RxStatus = %x\n",
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readl(&lp->lan_saa9730_regs->RxStatus));
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for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
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writel(i, &lp->lan_saa9730_regs->CamAddress);
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printk("lp->lan_saa9730_regs->CamData = %x\n",
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readl(&lp->lan_saa9730_regs->CamData));
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}
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printk("dev->stats.tx_packets = %lx\n", dev->stats.tx_packets);
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printk("dev->stats.tx_errors = %lx\n", dev->stats.tx_errors);
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printk("dev->stats.tx_aborted_errors = %lx\n",
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dev->stats.tx_aborted_errors);
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printk("dev->stats.tx_window_errors = %lx\n",
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dev->stats.tx_window_errors);
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printk("dev->stats.tx_carrier_errors = %lx\n",
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dev->stats.tx_carrier_errors);
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printk("dev->stats.tx_fifo_errors = %lx\n",
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dev->stats.tx_fifo_errors);
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printk("dev->stats.tx_heartbeat_errors = %lx\n",
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dev->stats.tx_heartbeat_errors);
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printk("dev->stats.collisions = %lx\n", dev->stats.collisions);
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printk("dev->stats.rx_packets = %lx\n", dev->stats.rx_packets);
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printk("dev->stats.rx_errors = %lx\n", dev->stats.rx_errors);
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printk("dev->stats.rx_dropped = %lx\n", dev->stats.rx_dropped);
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printk("dev->stats.rx_crc_errors = %lx\n", dev->stats.rx_crc_errors);
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printk("dev->stats.rx_frame_errors = %lx\n",
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dev->stats.rx_frame_errors);
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printk("dev->stats.rx_fifo_errors = %lx\n",
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dev->stats.rx_fifo_errors);
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printk("dev->stats.rx_length_errors = %lx\n",
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dev->stats.rx_length_errors);
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printk("lp->lan_saa9730_regs->DebugPCIMasterAddr = %x\n",
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readl(&lp->lan_saa9730_regs->DebugPCIMasterAddr));
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printk("lp->lan_saa9730_regs->DebugLanTxStateMachine = %x\n",
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readl(&lp->lan_saa9730_regs->DebugLanTxStateMachine));
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printk("lp->lan_saa9730_regs->DebugLanRxStateMachine = %x\n",
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readl(&lp->lan_saa9730_regs->DebugLanRxStateMachine));
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printk("lp->lan_saa9730_regs->DebugLanTxFifoPointers = %x\n",
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readl(&lp->lan_saa9730_regs->DebugLanTxFifoPointers));
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printk("lp->lan_saa9730_regs->DebugLanRxFifoPointers = %x\n",
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readl(&lp->lan_saa9730_regs->DebugLanRxFifoPointers));
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printk("lp->lan_saa9730_regs->DebugLanCtlStateMachine = %x\n",
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readl(&lp->lan_saa9730_regs->DebugLanCtlStateMachine));
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}
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static void lan_saa9730_buffer_init(struct lan_saa9730_private *lp)
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{
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int i, j;
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/* Init RX buffers */
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for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
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for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
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*(unsigned int *) lp->RcvBuffer[i][j] =
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cpu_to_le32(RXSF_READY <<
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RX_STAT_CTL_OWNER_SHF);
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}
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}
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/* Init TX buffers */
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for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
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for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
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*(unsigned int *) lp->TxmBuffer[i][j] =
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cpu_to_le32(TXSF_EMPTY <<
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TX_STAT_CTL_OWNER_SHF);
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}
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}
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}
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static void lan_saa9730_free_buffers(struct pci_dev *pdev,
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struct lan_saa9730_private *lp)
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{
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pci_free_consistent(pdev, lp->buffer_size, lp->buffer_start,
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lp->dma_addr);
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}
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static int lan_saa9730_allocate_buffers(struct pci_dev *pdev,
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struct lan_saa9730_private *lp)
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{
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void *Pa;
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unsigned int i, j, rxoffset, txoffset;
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int ret;
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/* Initialize buffer space */
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lp->DmaRcvPackets = LAN_SAA9730_RCV_Q_SIZE;
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lp->DmaTxmPackets = LAN_SAA9730_TXM_Q_SIZE;
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/* Initialize Rx Buffer Index */
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lp->NextRcvPacketIndex = 0;
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lp->NextRcvBufferIndex = 0;
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/* Set current buffer index & next available packet index */
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lp->NextTxmPacketIndex = 0;
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lp->NextTxmBufferIndex = 0;
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lp->PendingTxmPacketIndex = 0;
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lp->PendingTxmBufferIndex = 0;
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/*
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* Allocate all RX and TX packets in one chunk.
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* The Rx and Tx packets must be PACKET_SIZE aligned.
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*/
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lp->buffer_size = ((LAN_SAA9730_RCV_Q_SIZE + LAN_SAA9730_TXM_Q_SIZE) *
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LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_BUFFERS) +
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LAN_SAA9730_PACKET_SIZE;
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lp->buffer_start = pci_alloc_consistent(pdev, lp->buffer_size,
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&lp->dma_addr);
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if (!lp->buffer_start) {
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ret = -ENOMEM;
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goto out;
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}
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Pa = (void *)ALIGN((unsigned long)lp->buffer_start,
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LAN_SAA9730_PACKET_SIZE);
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rxoffset = Pa - lp->buffer_start;
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/* Init RX buffers */
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for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
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for (j = 0; j < LAN_SAA9730_RCV_Q_SIZE; j++) {
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*(unsigned int *) Pa =
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cpu_to_le32(RXSF_READY <<
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RX_STAT_CTL_OWNER_SHF);
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lp->RcvBuffer[i][j] = Pa;
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Pa += LAN_SAA9730_PACKET_SIZE;
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}
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}
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txoffset = Pa - lp->buffer_start;
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/* Init TX buffers */
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for (i = 0; i < LAN_SAA9730_BUFFERS; i++) {
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for (j = 0; j < LAN_SAA9730_TXM_Q_SIZE; j++) {
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*(unsigned int *) Pa =
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cpu_to_le32(TXSF_EMPTY <<
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TX_STAT_CTL_OWNER_SHF);
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lp->TxmBuffer[i][j] = Pa;
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Pa += LAN_SAA9730_PACKET_SIZE;
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}
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}
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/*
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* Set rx buffer A and rx buffer B to point to the first two buffer
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* spaces.
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*/
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writel(lp->dma_addr + rxoffset, &lp->lan_saa9730_regs->RxBuffA);
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writel(lp->dma_addr + rxoffset +
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LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_RCV_Q_SIZE,
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&lp->lan_saa9730_regs->RxBuffB);
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/*
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* Set txm_buf_a and txm_buf_b to point to the first two buffer
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* space
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*/
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writel(lp->dma_addr + txoffset,
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&lp->lan_saa9730_regs->TxBuffA);
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writel(lp->dma_addr + txoffset +
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LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_TXM_Q_SIZE,
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&lp->lan_saa9730_regs->TxBuffB);
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/* Set packet number */
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writel((lp->DmaRcvPackets << PK_COUNT_RX_A_SHF) |
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(lp->DmaRcvPackets << PK_COUNT_RX_B_SHF) |
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(lp->DmaTxmPackets << PK_COUNT_TX_A_SHF) |
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(lp->DmaTxmPackets << PK_COUNT_TX_B_SHF),
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&lp->lan_saa9730_regs->PacketCount);
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return 0;
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out:
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return ret;
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}
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static int lan_saa9730_cam_load(struct lan_saa9730_private *lp)
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{
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unsigned int i;
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unsigned char *NetworkAddress;
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NetworkAddress = (unsigned char *) &lp->PhysicalAddress[0][0];
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for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) {
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/* First set address to where data is written */
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writel(i, &lp->lan_saa9730_regs->CamAddress);
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writel((NetworkAddress[0] << 24) | (NetworkAddress[1] << 16) |
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(NetworkAddress[2] << 8) | NetworkAddress[3],
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&lp->lan_saa9730_regs->CamData);
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NetworkAddress += 4;
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}
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return 0;
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}
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static int lan_saa9730_cam_init(struct net_device *dev)
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{
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struct lan_saa9730_private *lp = netdev_priv(dev);
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unsigned int i;
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/* Copy MAC-address into all entries. */
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for (i = 0; i < LAN_SAA9730_CAM_ENTRIES; i++) {
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memcpy((unsigned char *) lp->PhysicalAddress[i],
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(unsigned char *) dev->dev_addr, 6);
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}
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return 0;
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}
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static int lan_saa9730_mii_init(struct lan_saa9730_private *lp)
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{
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int i, l;
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/* Check link status, spin here till station is not busy. */
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i = 0;
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while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
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i++;
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if (i > 100) {
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printk("Error: lan_saa9730_mii_init: timeout\n");
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return -1;
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}
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mdelay(1); /* wait 1 ms. */
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}
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/* Now set the control and address register. */
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writel(MD_CA_BUSY | PHY_STATUS | PHY_ADDRESS << MD_CA_PHY_SHF,
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&lp->lan_saa9730_regs->StationMgmtCtl);
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/* check link status, spin here till station is not busy */
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i = 0;
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while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) & MD_CA_BUSY) {
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i++;
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if (i > 100) {
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printk("Error: lan_saa9730_mii_init: timeout\n");
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return -1;
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}
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mdelay(1); /* wait 1 ms. */
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}
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/* Wait for 1 ms. */
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mdelay(1);
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|
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/* Check the link status. */
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if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
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PHY_STATUS_LINK_UP) {
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/* Link is up. */
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return 0;
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} else {
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/* Link is down, reset the PHY first. */
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/* set PHY address = 'CONTROL' */
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writel(PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | PHY_CONTROL,
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&lp->lan_saa9730_regs->StationMgmtCtl);
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/* Wait for 1 ms. */
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mdelay(1);
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/* set 'CONTROL' = force reset and renegotiate */
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writel(PHY_CONTROL_RESET | PHY_CONTROL_AUTO_NEG |
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PHY_CONTROL_RESTART_AUTO_NEG,
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&lp->lan_saa9730_regs->StationMgmtData);
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/* Wait for 50 ms. */
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mdelay(50);
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|
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/* set 'BUSY' to start operation */
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writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR |
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PHY_CONTROL, &lp->lan_saa9730_regs->StationMgmtCtl);
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|
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/* await completion */
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|
i = 0;
|
|
while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
|
|
MD_CA_BUSY) {
|
|
i++;
|
|
if (i > 100) {
|
|
printk
|
|
("Error: lan_saa9730_mii_init: timeout\n");
|
|
return -1;
|
|
}
|
|
mdelay(1); /* wait 1 ms. */
|
|
}
|
|
|
|
/* Wait for 1 ms. */
|
|
mdelay(1);
|
|
|
|
for (l = 0; l < 2; l++) {
|
|
/* set PHY address = 'STATUS' */
|
|
writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF |
|
|
PHY_STATUS,
|
|
&lp->lan_saa9730_regs->StationMgmtCtl);
|
|
|
|
/* await completion */
|
|
i = 0;
|
|
while (readl(&lp->lan_saa9730_regs->StationMgmtCtl) &
|
|
MD_CA_BUSY) {
|
|
i++;
|
|
if (i > 100) {
|
|
printk
|
|
("Error: lan_saa9730_mii_init: timeout\n");
|
|
return -1;
|
|
}
|
|
mdelay(1); /* wait 1 ms. */
|
|
}
|
|
|
|
/* wait for 3 sec. */
|
|
mdelay(3000);
|
|
|
|
/* check the link status */
|
|
if (readl(&lp->lan_saa9730_regs->StationMgmtData) &
|
|
PHY_STATUS_LINK_UP) {
|
|
/* link is up */
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lan_saa9730_control_init(struct lan_saa9730_private *lp)
|
|
{
|
|
/* Initialize DMA control register. */
|
|
writel((LANMB_ANY << DMA_CTL_MAX_XFER_SHF) |
|
|
(LANEND_LITTLE << DMA_CTL_ENDIAN_SHF) |
|
|
(LAN_SAA9730_RCV_Q_INT_THRESHOLD << DMA_CTL_RX_INT_COUNT_SHF)
|
|
| DMA_CTL_RX_INT_TO_EN | DMA_CTL_RX_INT_EN |
|
|
DMA_CTL_MAC_RX_INT_EN | DMA_CTL_MAC_TX_INT_EN,
|
|
&lp->lan_saa9730_regs->LanDmaCtl);
|
|
|
|
/* Initial MAC control register. */
|
|
writel((MACCM_MII << MAC_CONTROL_CONN_SHF) | MAC_CONTROL_FULL_DUP,
|
|
&lp->lan_saa9730_regs->MacCtl);
|
|
|
|
/* Initialize CAM control register. */
|
|
writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_BROAD_ACC,
|
|
&lp->lan_saa9730_regs->CamCtl);
|
|
|
|
/*
|
|
* Initialize CAM enable register, only turn on first entry, should
|
|
* contain own addr.
|
|
*/
|
|
writel(0x0001, &lp->lan_saa9730_regs->CamEnable);
|
|
|
|
/* Initialize Tx control register */
|
|
writel(TX_CTL_EN_COMP, &lp->lan_saa9730_regs->TxCtl);
|
|
|
|
/* Initialize Rcv control register */
|
|
writel(RX_CTL_STRIP_CRC, &lp->lan_saa9730_regs->RxCtl);
|
|
|
|
/* Reset DMA engine */
|
|
writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lan_saa9730_stop(struct lan_saa9730_private *lp)
|
|
{
|
|
int i;
|
|
|
|
/* Stop DMA first */
|
|
writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) &
|
|
~(DMA_CTL_EN_TX_DMA | DMA_CTL_EN_RX_DMA),
|
|
&lp->lan_saa9730_regs->LanDmaCtl);
|
|
|
|
/* Set the SW Reset bits in DMA and MAC control registers */
|
|
writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest);
|
|
writel(readl(&lp->lan_saa9730_regs->MacCtl) | MAC_CONTROL_RESET,
|
|
&lp->lan_saa9730_regs->MacCtl);
|
|
|
|
/*
|
|
* Wait for MAC reset to have finished. The reset bit is auto cleared
|
|
* when the reset is done.
|
|
*/
|
|
i = 0;
|
|
while (readl(&lp->lan_saa9730_regs->MacCtl) & MAC_CONTROL_RESET) {
|
|
i++;
|
|
if (i > 100) {
|
|
printk
|
|
("Error: lan_sa9730_stop: MAC reset timeout\n");
|
|
return -1;
|
|
}
|
|
mdelay(1); /* wait 1 ms. */
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lan_saa9730_dma_init(struct lan_saa9730_private *lp)
|
|
{
|
|
/* Stop lan controller. */
|
|
lan_saa9730_stop(lp);
|
|
|
|
writel(LAN_SAA9730_DEFAULT_TIME_OUT_CNT,
|
|
&lp->lan_saa9730_regs->Timeout);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lan_saa9730_start(struct lan_saa9730_private *lp)
|
|
{
|
|
lan_saa9730_buffer_init(lp);
|
|
|
|
/* Initialize Rx Buffer Index */
|
|
lp->NextRcvPacketIndex = 0;
|
|
lp->NextRcvBufferIndex = 0;
|
|
|
|
/* Set current buffer index & next available packet index */
|
|
lp->NextTxmPacketIndex = 0;
|
|
lp->NextTxmBufferIndex = 0;
|
|
lp->PendingTxmPacketIndex = 0;
|
|
lp->PendingTxmBufferIndex = 0;
|
|
|
|
writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) | DMA_CTL_EN_TX_DMA |
|
|
DMA_CTL_EN_RX_DMA, &lp->lan_saa9730_regs->LanDmaCtl);
|
|
|
|
/* For Tx, turn on MAC then DMA */
|
|
writel(readl(&lp->lan_saa9730_regs->TxCtl) | TX_CTL_TX_EN,
|
|
&lp->lan_saa9730_regs->TxCtl);
|
|
|
|
/* For Rx, turn on DMA then MAC */
|
|
writel(readl(&lp->lan_saa9730_regs->RxCtl) | RX_CTL_RX_EN,
|
|
&lp->lan_saa9730_regs->RxCtl);
|
|
|
|
/* Set Ok2Use to let hardware own the buffers. */
|
|
writel(OK2USE_RX_A | OK2USE_RX_B, &lp->lan_saa9730_regs->Ok2Use);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lan_saa9730_restart(struct lan_saa9730_private *lp)
|
|
{
|
|
lan_saa9730_stop(lp);
|
|
lan_saa9730_start(lp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lan_saa9730_tx(struct net_device *dev)
|
|
{
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
unsigned int *pPacket;
|
|
unsigned int tx_status;
|
|
|
|
if (lan_saa9730_debug > 5)
|
|
printk("lan_saa9730_tx interrupt\n");
|
|
|
|
/* Clear interrupt. */
|
|
writel(DMA_STATUS_MAC_TX_INT, &lp->lan_saa9730_regs->DmaStatus);
|
|
|
|
while (1) {
|
|
pPacket = lp->TxmBuffer[lp->PendingTxmBufferIndex]
|
|
[lp->PendingTxmPacketIndex];
|
|
|
|
/* Get status of first packet transmitted. */
|
|
tx_status = le32_to_cpu(*pPacket);
|
|
|
|
/* Check ownership. */
|
|
if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
|
|
(TXSF_HWDONE << TX_STAT_CTL_OWNER_SHF)) break;
|
|
|
|
/* Check for error. */
|
|
if (tx_status & TX_STAT_CTL_ERROR_MSK) {
|
|
if (lan_saa9730_debug > 1)
|
|
printk("lan_saa9730_tx: tx error = %x\n",
|
|
tx_status);
|
|
|
|
dev->stats.tx_errors++;
|
|
if (tx_status &
|
|
(TX_STATUS_EX_COLL << TX_STAT_CTL_STATUS_SHF))
|
|
dev->stats.tx_aborted_errors++;
|
|
if (tx_status &
|
|
(TX_STATUS_LATE_COLL << TX_STAT_CTL_STATUS_SHF))
|
|
dev->stats.tx_window_errors++;
|
|
if (tx_status &
|
|
(TX_STATUS_L_CARR << TX_STAT_CTL_STATUS_SHF))
|
|
dev->stats.tx_carrier_errors++;
|
|
if (tx_status &
|
|
(TX_STATUS_UNDER << TX_STAT_CTL_STATUS_SHF))
|
|
dev->stats.tx_fifo_errors++;
|
|
if (tx_status &
|
|
(TX_STATUS_SQ_ERR << TX_STAT_CTL_STATUS_SHF))
|
|
dev->stats.tx_heartbeat_errors++;
|
|
|
|
dev->stats.collisions +=
|
|
tx_status & TX_STATUS_TX_COLL_MSK;
|
|
}
|
|
|
|
/* Free buffer. */
|
|
*pPacket =
|
|
cpu_to_le32(TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF);
|
|
|
|
/* Update pending index pointer. */
|
|
lp->PendingTxmPacketIndex++;
|
|
if (lp->PendingTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
|
|
lp->PendingTxmPacketIndex = 0;
|
|
lp->PendingTxmBufferIndex ^= 1;
|
|
}
|
|
}
|
|
|
|
/* The tx buffer is no longer full. */
|
|
netif_wake_queue(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lan_saa9730_rx(struct net_device *dev)
|
|
{
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
int len = 0;
|
|
struct sk_buff *skb = 0;
|
|
unsigned int rx_status;
|
|
int BufferIndex;
|
|
int PacketIndex;
|
|
unsigned int *pPacket;
|
|
unsigned char *pData;
|
|
|
|
if (lan_saa9730_debug > 5)
|
|
printk("lan_saa9730_rx interrupt\n");
|
|
|
|
/* Clear receive interrupts. */
|
|
writel(DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
|
|
DMA_STATUS_RX_TO_INT, &lp->lan_saa9730_regs->DmaStatus);
|
|
|
|
/* Address next packet */
|
|
BufferIndex = lp->NextRcvBufferIndex;
|
|
PacketIndex = lp->NextRcvPacketIndex;
|
|
pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
|
|
rx_status = le32_to_cpu(*pPacket);
|
|
|
|
/* Process each packet. */
|
|
while ((rx_status & RX_STAT_CTL_OWNER_MSK) ==
|
|
(RXSF_HWDONE << RX_STAT_CTL_OWNER_SHF)) {
|
|
/* Check the rx status. */
|
|
if (rx_status & (RX_STATUS_GOOD << RX_STAT_CTL_STATUS_SHF)) {
|
|
/* Received packet is good. */
|
|
len = (rx_status & RX_STAT_CTL_LENGTH_MSK) >>
|
|
RX_STAT_CTL_LENGTH_SHF;
|
|
|
|
pData = (unsigned char *) pPacket;
|
|
pData += 4;
|
|
skb = dev_alloc_skb(len + 2);
|
|
if (skb == 0) {
|
|
printk
|
|
("%s: Memory squeeze, deferring packet.\n",
|
|
dev->name);
|
|
dev->stats.rx_dropped++;
|
|
} else {
|
|
dev->stats.rx_bytes += len;
|
|
dev->stats.rx_packets++;
|
|
skb_reserve(skb, 2); /* 16 byte align */
|
|
skb_put(skb, len); /* make room */
|
|
skb_copy_to_linear_data(skb,
|
|
(unsigned char *) pData,
|
|
len);
|
|
skb->protocol = eth_type_trans(skb, dev);
|
|
netif_rx(skb);
|
|
dev->last_rx = jiffies;
|
|
}
|
|
} else {
|
|
/* We got an error packet. */
|
|
if (lan_saa9730_debug > 2)
|
|
printk
|
|
("lan_saa9730_rx: We got an error packet = %x\n",
|
|
rx_status);
|
|
|
|
dev->stats.rx_errors++;
|
|
if (rx_status &
|
|
(RX_STATUS_CRC_ERR << RX_STAT_CTL_STATUS_SHF))
|
|
dev->stats.rx_crc_errors++;
|
|
if (rx_status &
|
|
(RX_STATUS_ALIGN_ERR << RX_STAT_CTL_STATUS_SHF))
|
|
dev->stats.rx_frame_errors++;
|
|
if (rx_status &
|
|
(RX_STATUS_OVERFLOW << RX_STAT_CTL_STATUS_SHF))
|
|
dev->stats.rx_fifo_errors++;
|
|
if (rx_status &
|
|
(RX_STATUS_LONG_ERR << RX_STAT_CTL_STATUS_SHF))
|
|
dev->stats.rx_length_errors++;
|
|
}
|
|
|
|
/* Indicate we have processed the buffer. */
|
|
*pPacket = cpu_to_le32(RXSF_READY << RX_STAT_CTL_OWNER_SHF);
|
|
|
|
/* Make sure A or B is available to hardware as appropriate. */
|
|
writel(BufferIndex ? OK2USE_RX_B : OK2USE_RX_A,
|
|
&lp->lan_saa9730_regs->Ok2Use);
|
|
|
|
/* Go to next packet in sequence. */
|
|
lp->NextRcvPacketIndex++;
|
|
if (lp->NextRcvPacketIndex >= LAN_SAA9730_RCV_Q_SIZE) {
|
|
lp->NextRcvPacketIndex = 0;
|
|
lp->NextRcvBufferIndex ^= 1;
|
|
}
|
|
|
|
/* Address next packet */
|
|
BufferIndex = lp->NextRcvBufferIndex;
|
|
PacketIndex = lp->NextRcvPacketIndex;
|
|
pPacket = lp->RcvBuffer[BufferIndex][PacketIndex];
|
|
rx_status = le32_to_cpu(*pPacket);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static irqreturn_t lan_saa9730_interrupt(const int irq, void *dev_id)
|
|
{
|
|
struct net_device *dev = dev_id;
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
|
|
if (lan_saa9730_debug > 5)
|
|
printk("lan_saa9730_interrupt\n");
|
|
|
|
/* Disable the EVM LAN interrupt. */
|
|
evm_saa9730_block_lan_int(lp);
|
|
|
|
/* Clear the EVM LAN interrupt. */
|
|
evm_saa9730_clear_lan_int(lp);
|
|
|
|
/* Service pending transmit interrupts. */
|
|
if (readl(&lp->lan_saa9730_regs->DmaStatus) & DMA_STATUS_MAC_TX_INT)
|
|
lan_saa9730_tx(dev);
|
|
|
|
/* Service pending receive interrupts. */
|
|
if (readl(&lp->lan_saa9730_regs->DmaStatus) &
|
|
(DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT |
|
|
DMA_STATUS_RX_TO_INT)) lan_saa9730_rx(dev);
|
|
|
|
/* Enable the EVM LAN interrupt. */
|
|
evm_saa9730_unblock_lan_int(lp);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int lan_saa9730_open(struct net_device *dev)
|
|
{
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
|
|
/* Associate IRQ with lan_saa9730_interrupt */
|
|
if (request_irq(dev->irq, &lan_saa9730_interrupt, 0, "SAA9730 Eth",
|
|
dev)) {
|
|
printk("lan_saa9730_open: Can't get irq %d\n", dev->irq);
|
|
return -EAGAIN;
|
|
}
|
|
|
|
/* Enable the Lan interrupt in the event manager. */
|
|
evm_saa9730_enable_lan_int(lp);
|
|
|
|
/* Start the LAN controller */
|
|
if (lan_saa9730_start(lp))
|
|
return -1;
|
|
|
|
netif_start_queue(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lan_saa9730_write(struct lan_saa9730_private *lp,
|
|
struct sk_buff *skb, int skblen)
|
|
{
|
|
unsigned char *pbData = skb->data;
|
|
unsigned int len = skblen;
|
|
unsigned char *pbPacketData;
|
|
unsigned int tx_status;
|
|
int BufferIndex;
|
|
int PacketIndex;
|
|
|
|
if (lan_saa9730_debug > 5)
|
|
printk("lan_saa9730_write: skb=%p\n", skb);
|
|
|
|
BufferIndex = lp->NextTxmBufferIndex;
|
|
PacketIndex = lp->NextTxmPacketIndex;
|
|
|
|
tx_status = le32_to_cpu(*(unsigned int *)lp->TxmBuffer[BufferIndex]
|
|
[PacketIndex]);
|
|
if ((tx_status & TX_STAT_CTL_OWNER_MSK) !=
|
|
(TXSF_EMPTY << TX_STAT_CTL_OWNER_SHF)) {
|
|
if (lan_saa9730_debug > 4)
|
|
printk
|
|
("lan_saa9730_write: Tx buffer not available: tx_status = %x\n",
|
|
tx_status);
|
|
return -1;
|
|
}
|
|
|
|
lp->NextTxmPacketIndex++;
|
|
if (lp->NextTxmPacketIndex >= LAN_SAA9730_TXM_Q_SIZE) {
|
|
lp->NextTxmPacketIndex = 0;
|
|
lp->NextTxmBufferIndex ^= 1;
|
|
}
|
|
|
|
pbPacketData = lp->TxmBuffer[BufferIndex][PacketIndex];
|
|
pbPacketData += 4;
|
|
|
|
/* copy the bits */
|
|
memcpy(pbPacketData, pbData, len);
|
|
|
|
/* Set transmit status for hardware */
|
|
*(unsigned int *)lp->TxmBuffer[BufferIndex][PacketIndex] =
|
|
cpu_to_le32((TXSF_READY << TX_STAT_CTL_OWNER_SHF) |
|
|
(TX_STAT_CTL_INT_AFTER_TX <<
|
|
TX_STAT_CTL_FRAME_SHF) |
|
|
(len << TX_STAT_CTL_LENGTH_SHF));
|
|
|
|
/* Make sure A or B is available to hardware as appropriate. */
|
|
writel(BufferIndex ? OK2USE_TX_B : OK2USE_TX_A,
|
|
&lp->lan_saa9730_regs->Ok2Use);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void lan_saa9730_tx_timeout(struct net_device *dev)
|
|
{
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
|
|
/* Transmitter timeout, serious problems */
|
|
dev->stats.tx_errors++;
|
|
printk("%s: transmit timed out, reset\n", dev->name);
|
|
/*show_saa9730_regs(dev); */
|
|
lan_saa9730_restart(lp);
|
|
|
|
dev->trans_start = jiffies;
|
|
netif_wake_queue(dev);
|
|
}
|
|
|
|
static int lan_saa9730_start_xmit(struct sk_buff *skb,
|
|
struct net_device *dev)
|
|
{
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
unsigned long flags;
|
|
int skblen;
|
|
int len;
|
|
|
|
if (lan_saa9730_debug > 4)
|
|
printk("Send packet: skb=%p\n", skb);
|
|
|
|
skblen = skb->len;
|
|
|
|
spin_lock_irqsave(&lp->lock, flags);
|
|
|
|
len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
|
|
|
|
if (lan_saa9730_write(lp, skb, skblen)) {
|
|
spin_unlock_irqrestore(&lp->lock, flags);
|
|
printk("Error when writing packet to controller: skb=%p\n", skb);
|
|
netif_stop_queue(dev);
|
|
return -1;
|
|
}
|
|
|
|
dev->stats.tx_bytes += len;
|
|
dev->stats.tx_packets++;
|
|
|
|
dev->trans_start = jiffies;
|
|
netif_wake_queue(dev);
|
|
dev_kfree_skb(skb);
|
|
|
|
spin_unlock_irqrestore(&lp->lock, flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int lan_saa9730_close(struct net_device *dev)
|
|
{
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
|
|
if (lan_saa9730_debug > 1)
|
|
printk("lan_saa9730_close:\n");
|
|
|
|
netif_stop_queue(dev);
|
|
|
|
/* Disable the Lan interrupt in the event manager. */
|
|
evm_saa9730_disable_lan_int(lp);
|
|
|
|
/* Stop the controller */
|
|
if (lan_saa9730_stop(lp))
|
|
return -1;
|
|
|
|
free_irq(dev->irq, (void *) dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void lan_saa9730_set_multicast(struct net_device *dev)
|
|
{
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
|
|
/* Stop the controller */
|
|
lan_saa9730_stop(lp);
|
|
|
|
if (dev->flags & IFF_PROMISC) {
|
|
/* accept all packets */
|
|
writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_STATION_ACC |
|
|
CAM_CONTROL_GROUP_ACC | CAM_CONTROL_BROAD_ACC,
|
|
&lp->lan_saa9730_regs->CamCtl);
|
|
} else {
|
|
if (dev->flags & IFF_ALLMULTI || dev->mc_count) {
|
|
/* accept all multicast packets */
|
|
/*
|
|
* Will handle the multicast stuff later. -carstenl
|
|
*/
|
|
writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_GROUP_ACC |
|
|
CAM_CONTROL_BROAD_ACC,
|
|
&lp->lan_saa9730_regs->CamCtl);
|
|
}
|
|
}
|
|
|
|
lan_saa9730_restart(lp);
|
|
}
|
|
|
|
|
|
static void __devexit saa9730_remove_one(struct pci_dev *pdev)
|
|
{
|
|
struct net_device *dev = pci_get_drvdata(pdev);
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
|
|
if (dev) {
|
|
unregister_netdev(dev);
|
|
lan_saa9730_free_buffers(pdev, lp);
|
|
iounmap(lp->lan_saa9730_regs);
|
|
iounmap(lp->evm_saa9730_regs);
|
|
free_netdev(dev);
|
|
pci_release_regions(pdev);
|
|
pci_disable_device(pdev);
|
|
pci_set_drvdata(pdev, NULL);
|
|
}
|
|
}
|
|
|
|
|
|
static int lan_saa9730_init(struct net_device *dev, struct pci_dev *pdev,
|
|
unsigned long ioaddr, int irq)
|
|
{
|
|
struct lan_saa9730_private *lp = netdev_priv(dev);
|
|
unsigned char ethernet_addr[6];
|
|
int ret;
|
|
|
|
if (get_ethernet_addr(ethernet_addr)) {
|
|
ret = -ENODEV;
|
|
goto out;
|
|
}
|
|
|
|
memcpy(dev->dev_addr, ethernet_addr, 6);
|
|
dev->base_addr = ioaddr;
|
|
dev->irq = irq;
|
|
|
|
lp->pci_dev = pdev;
|
|
|
|
/* Set SAA9730 LAN base address. */
|
|
lp->lan_saa9730_regs = ioremap(ioaddr + SAA9730_LAN_REGS_ADDR,
|
|
SAA9730_LAN_REGS_SIZE);
|
|
if (!lp->lan_saa9730_regs) {
|
|
ret = -ENOMEM;
|
|
goto out;
|
|
}
|
|
|
|
/* Set SAA9730 EVM base address. */
|
|
lp->evm_saa9730_regs = ioremap(ioaddr + SAA9730_EVM_REGS_ADDR,
|
|
SAA9730_EVM_REGS_SIZE);
|
|
if (!lp->evm_saa9730_regs) {
|
|
ret = -ENOMEM;
|
|
goto out_iounmap_lan;
|
|
}
|
|
|
|
/* Allocate LAN RX/TX frame buffer space. */
|
|
if ((ret = lan_saa9730_allocate_buffers(pdev, lp)))
|
|
goto out_iounmap;
|
|
|
|
/* Stop LAN controller. */
|
|
if ((ret = lan_saa9730_stop(lp)))
|
|
goto out_free_consistent;
|
|
|
|
/* Initialize CAM registers. */
|
|
if ((ret = lan_saa9730_cam_init(dev)))
|
|
goto out_free_consistent;
|
|
|
|
/* Initialize MII registers. */
|
|
if ((ret = lan_saa9730_mii_init(lp)))
|
|
goto out_free_consistent;
|
|
|
|
/* Initialize control registers. */
|
|
if ((ret = lan_saa9730_control_init(lp)))
|
|
goto out_free_consistent;
|
|
|
|
/* Load CAM registers. */
|
|
if ((ret = lan_saa9730_cam_load(lp)))
|
|
goto out_free_consistent;
|
|
|
|
/* Initialize DMA context registers. */
|
|
if ((ret = lan_saa9730_dma_init(lp)))
|
|
goto out_free_consistent;
|
|
|
|
spin_lock_init(&lp->lock);
|
|
|
|
dev->open = lan_saa9730_open;
|
|
dev->hard_start_xmit = lan_saa9730_start_xmit;
|
|
dev->stop = lan_saa9730_close;
|
|
dev->set_multicast_list = lan_saa9730_set_multicast;
|
|
dev->tx_timeout = lan_saa9730_tx_timeout;
|
|
dev->watchdog_timeo = (HZ >> 1);
|
|
dev->dma = 0;
|
|
|
|
ret = register_netdev (dev);
|
|
if (ret)
|
|
goto out_free_consistent;
|
|
|
|
return 0;
|
|
|
|
out_free_consistent:
|
|
lan_saa9730_free_buffers(pdev, lp);
|
|
out_iounmap:
|
|
iounmap(lp->evm_saa9730_regs);
|
|
out_iounmap_lan:
|
|
iounmap(lp->lan_saa9730_regs);
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
|
|
static int __devinit saa9730_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
|
|
{
|
|
struct net_device *dev = NULL;
|
|
unsigned long pci_ioaddr;
|
|
int err;
|
|
|
|
if (lan_saa9730_debug > 1)
|
|
printk("saa9730.c: PCI bios is present, checking for devices...\n");
|
|
|
|
err = pci_enable_device(pdev);
|
|
if (err) {
|
|
printk(KERN_ERR "Cannot enable PCI device, aborting.\n");
|
|
goto out;
|
|
}
|
|
|
|
err = pci_request_regions(pdev, DRV_MODULE_NAME);
|
|
if (err) {
|
|
printk(KERN_ERR "Cannot obtain PCI resources, aborting.\n");
|
|
goto out_disable_pdev;
|
|
}
|
|
|
|
pci_irq_line = pdev->irq;
|
|
/* LAN base address in located at BAR 1. */
|
|
|
|
pci_ioaddr = pci_resource_start(pdev, 1);
|
|
pci_set_master(pdev);
|
|
|
|
printk("Found SAA9730 (PCI) at %lx, irq %d.\n",
|
|
pci_ioaddr, pci_irq_line);
|
|
|
|
dev = alloc_etherdev(sizeof(struct lan_saa9730_private));
|
|
if (!dev)
|
|
goto out_disable_pdev;
|
|
|
|
err = lan_saa9730_init(dev, pdev, pci_ioaddr, pci_irq_line);
|
|
if (err) {
|
|
printk("LAN init failed");
|
|
goto out_free_netdev;
|
|
}
|
|
|
|
pci_set_drvdata(pdev, dev);
|
|
SET_NETDEV_DEV(dev, &pdev->dev);
|
|
return 0;
|
|
|
|
out_free_netdev:
|
|
free_netdev(dev);
|
|
out_disable_pdev:
|
|
pci_disable_device(pdev);
|
|
out:
|
|
pci_set_drvdata(pdev, NULL);
|
|
return err;
|
|
}
|
|
|
|
|
|
static struct pci_driver saa9730_driver = {
|
|
.name = DRV_MODULE_NAME,
|
|
.id_table = saa9730_pci_tbl,
|
|
.probe = saa9730_init_one,
|
|
.remove = __devexit_p(saa9730_remove_one),
|
|
};
|
|
|
|
|
|
static int __init saa9730_init(void)
|
|
{
|
|
return pci_register_driver(&saa9730_driver);
|
|
}
|
|
|
|
static void __exit saa9730_cleanup(void)
|
|
{
|
|
pci_unregister_driver(&saa9730_driver);
|
|
}
|
|
|
|
module_init(saa9730_init);
|
|
module_exit(saa9730_cleanup);
|
|
|
|
MODULE_AUTHOR("Ralf Baechle <ralf@linux-mips.org>");
|
|
MODULE_DESCRIPTION("Philips SAA9730 ethernet driver");
|
|
MODULE_LICENSE("GPL");
|