Ashish Kumar 9607af6f85 mtd: spi-nor: Rename "n25q512a" to "mt25qu512a (n25q512a)" ... n25q512a was rebranded to mt25qu512a after its spin off from STM. mt25qu512a is different only in terms of operating frequency, the JEDEC id is the same as in n25q512a. Dual reads are supported (0x3b, 0x3c), set the SPI_NOR_DUAL_READ flag. 4-byte opcodes are supported, set the SPI_NOR_4B_OPCODES flag. Tested Single I/O and QUAD I/O mode on LS1046FRWY. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> [tudor.ambarus@microchip.com: rename entry to "mt25qu512a (n25q512a)", reword commit message, order entry by size, drop comment as it looked redundant] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>		2019-08-30 10:11:50 +03:00
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aspeed-smc.c	mtd: spi-nor: aspeed-smc: Add of_node_put()	2019-08-28 12:40:31 +03:00
cadence-quadspi.c	mtd: spi-nor: Fix Cadence QSPI RCU Schedule Stall	2019-08-21 10:07:42 +03:00
hisi-sfc.c	mtd: spi-nor: hisi-sfc: Add of_node_put() before break	2019-08-28 12:40:31 +03:00
intel-spi-pci.c	mtd: spi-nor: intel-spi: Add support for Intel Tiger Lake SPI serial flash	2019-08-20 17:47:18 +03:00
intel-spi-platform.c	mtd: spi-nor: intel-spi: Convert to use SPDX identifier	2019-06-22 14:59:27 +03:00
intel-spi.c	mtd: spi-nor: intel-spi: Whitelist 4B read commands	2019-08-21 11:09:46 +03:00
intel-spi.h	mtd: spi-nor: intel-spi: Convert to use SPDX identifier	2019-06-22 14:59:27 +03:00
Kconfig	mtd: spi-nor: Move m25p80 code in spi-nor.c	2019-08-12 10:54:12 +03:00
Makefile	mtd: spi-nor: stm32: remove the driver as it was replaced by spi-stm32-qspi.c	2019-06-07 07:10:38 +03:00
mtk-quadspi.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174	2019-05-30 11:26:41 -07:00
nxp-spifi.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500	2019-06-19 17:09:55 +02:00
spi-nor.c	mtd: spi-nor: Rename "n25q512a" to "mt25qu512a (n25q512a)"	2019-08-30 10:11:50 +03:00