mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
0a28714c53
In systems with three levels of cache(PoU at L1 and PoC at L3), PoC cache flush instructions flushes L2 and L3 caches which could affect performance. For cache flushes for I and D coherency, PoU should suffice. So changing all I and D coherency related cache flushes to PoU. Introduced a new __clean_dcache_area_pou API for dcache flush till PoU and provided a common macro for __flush_dcache_area and __clean_dcache_area_pou. Also, now in __sync_icache_dcache, icache invalidation for non-aliasing VIPT icache is done only for that particular page instead of the earlier __flush_icache_all. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Ashok Kumar <ashoks@broadcom.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
121 lines
3.2 KiB
C
121 lines
3.2 KiB
C
/*
|
|
* Based on arch/arm/mm/flush.c
|
|
*
|
|
* Copyright (C) 1995-2002 Russell King
|
|
* Copyright (C) 2012 ARM Ltd.
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#include <linux/export.h>
|
|
#include <linux/mm.h>
|
|
#include <linux/pagemap.h>
|
|
|
|
#include <asm/cacheflush.h>
|
|
#include <asm/cachetype.h>
|
|
#include <asm/tlbflush.h>
|
|
|
|
#include "mm.h"
|
|
|
|
void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
|
|
unsigned long end)
|
|
{
|
|
if (vma->vm_flags & VM_EXEC)
|
|
__flush_icache_all();
|
|
}
|
|
|
|
static void sync_icache_aliases(void *kaddr, unsigned long len)
|
|
{
|
|
unsigned long addr = (unsigned long)kaddr;
|
|
|
|
if (icache_is_aliasing()) {
|
|
__clean_dcache_area_pou(kaddr, len);
|
|
__flush_icache_all();
|
|
} else {
|
|
flush_icache_range(addr, addr + len);
|
|
}
|
|
}
|
|
|
|
static void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
|
|
unsigned long uaddr, void *kaddr,
|
|
unsigned long len)
|
|
{
|
|
if (vma->vm_flags & VM_EXEC)
|
|
sync_icache_aliases(kaddr, len);
|
|
}
|
|
|
|
/*
|
|
* Copy user data from/to a page which is mapped into a different processes
|
|
* address space. Really, we want to allow our "user space" model to handle
|
|
* this.
|
|
*
|
|
* Note that this code needs to run on the current CPU.
|
|
*/
|
|
void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
|
|
unsigned long uaddr, void *dst, const void *src,
|
|
unsigned long len)
|
|
{
|
|
preempt_disable();
|
|
memcpy(dst, src, len);
|
|
flush_ptrace_access(vma, page, uaddr, dst, len);
|
|
preempt_enable();
|
|
}
|
|
|
|
void __sync_icache_dcache(pte_t pte, unsigned long addr)
|
|
{
|
|
struct page *page = pte_page(pte);
|
|
|
|
/* no flushing needed for anonymous pages */
|
|
if (!page_mapping(page))
|
|
return;
|
|
|
|
if (!test_and_set_bit(PG_dcache_clean, &page->flags))
|
|
sync_icache_aliases(page_address(page),
|
|
PAGE_SIZE << compound_order(page));
|
|
else if (icache_is_aivivt())
|
|
__flush_icache_all();
|
|
}
|
|
|
|
/*
|
|
* This function is called when a page has been modified by the kernel. Mark
|
|
* it as dirty for later flushing when mapped in user space (if executable,
|
|
* see __sync_icache_dcache).
|
|
*/
|
|
void flush_dcache_page(struct page *page)
|
|
{
|
|
if (test_bit(PG_dcache_clean, &page->flags))
|
|
clear_bit(PG_dcache_clean, &page->flags);
|
|
}
|
|
EXPORT_SYMBOL(flush_dcache_page);
|
|
|
|
/*
|
|
* Additional functions defined in assembly.
|
|
*/
|
|
EXPORT_SYMBOL(flush_icache_range);
|
|
|
|
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
|
|
#ifdef CONFIG_HAVE_RCU_TABLE_FREE
|
|
void pmdp_splitting_flush(struct vm_area_struct *vma, unsigned long address,
|
|
pmd_t *pmdp)
|
|
{
|
|
pmd_t pmd = pmd_mksplitting(*pmdp);
|
|
|
|
VM_BUG_ON(address & ~PMD_MASK);
|
|
set_pmd_at(vma->vm_mm, address, pmdp, pmd);
|
|
|
|
/* dummy IPI to serialise against fast_gup */
|
|
kick_all_cpus_sync();
|
|
}
|
|
#endif /* CONFIG_HAVE_RCU_TABLE_FREE */
|
|
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
|