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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 135 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531081036.435762997@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
83 lines
2.1 KiB
C
83 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* z0194a.h Sharp z0194a tuner support
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*
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* Copyright (C) 2008 Igor M. Liplianin (liplianin@me.by)
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*
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* see Documentation/media/dvb-drivers/dvb-usb.rst for more information
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*/
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#ifndef Z0194A
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#define Z0194A
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static int sharp_z0194a_set_symbol_rate(struct dvb_frontend *fe,
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u32 srate, u32 ratio)
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{
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u8 aclk = 0;
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u8 bclk = 0;
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if (srate < 1500000) {
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aclk = 0xb7; bclk = 0x47; }
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else if (srate < 3000000) {
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aclk = 0xb7; bclk = 0x4b; }
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else if (srate < 7000000) {
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aclk = 0xb7; bclk = 0x4f; }
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else if (srate < 14000000) {
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aclk = 0xb7; bclk = 0x53; }
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else if (srate < 30000000) {
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aclk = 0xb6; bclk = 0x53; }
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else if (srate < 45000000) {
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aclk = 0xb4; bclk = 0x51; }
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stv0299_writereg(fe, 0x13, aclk);
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stv0299_writereg(fe, 0x14, bclk);
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stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
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stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
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stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
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return 0;
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}
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static u8 sharp_z0194a_inittab[] = {
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0x01, 0x15,
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0x02, 0x30,
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0x03, 0x00,
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0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
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0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */
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0x06, 0x40, /* DAC not used, set to high impendance mode */
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0x07, 0x00, /* DAC LSB */
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0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */
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0x09, 0x00, /* FIFO */
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0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */
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0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */
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0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */
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0x10, 0x3f, /* AGC2 0x3d */
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0x11, 0x84,
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0x12, 0xb9,
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0x15, 0xc9, /* lock detector threshold */
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0x16, 0x00,
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0x17, 0x00,
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0x18, 0x00,
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0x19, 0x00,
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0x1a, 0x00,
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0x1f, 0x50,
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0x20, 0x00,
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0x21, 0x00,
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0x22, 0x00,
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0x23, 0x00,
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0x28, 0x00, /* out imp: normal out type: parallel FEC mode:0 */
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0x29, 0x1e, /* 1/2 threshold */
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0x2a, 0x14, /* 2/3 threshold */
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0x2b, 0x0f, /* 3/4 threshold */
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0x2c, 0x09, /* 5/6 threshold */
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0x2d, 0x05, /* 7/8 threshold */
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0x2e, 0x01,
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0x31, 0x1f, /* test all FECs */
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0x32, 0x19, /* viterbi and synchro search */
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0x33, 0xfc, /* rs control */
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0x34, 0x93, /* error control */
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0x0f, 0x52,
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0xff, 0xff
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};
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#endif
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