mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-23 21:59:15 +07:00
8c058b0b9c
Commitd32932d02e("x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces") brought a regression for Hyper-V Gen2 instances. These instances don't have i8259 legacy PIC but they use legacy IRQs for serial port, rtc, and acpi. With this commit included we end up with these IRQs not initialized. Earlier, there was a special workaround for legacy IRQs in mp_map_pin_to_irq() doing mp_irqdomain_map() without looking at nr_legacy_irqs() and now we fail in __irq_domain_alloc_irqs() when irq_domain_alloc_descs() returns -EEXIST. The essence of the issue seems to be that early_irq_init() calls arch_probe_nr_irqs() to figure out the number of legacy IRQs before we probe for i8259 and gets 16. Later when init_8259A() is called we switch to NULL legacy PIC and nr_legacy_irqs() starts to return 0 but we already have 16 descs allocated. Solve the issue by separating i8259 probe from init and calling it in arch_probe_nr_irqs() before we actually use nr_legacy_irqs() information. Fixes:d32932d02e("x86/irq: Convert IOAPIC to use hierarchical irqdomain interfaces") Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: K. Y. Srinivasan <kys@microsoft.com> Cc: stable@vger.kernel.org Link: http://lkml.kernel.org/r/1446543614-3621-1-git-send-email-vkuznets@redhat.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
77 lines
1.8 KiB
C
77 lines
1.8 KiB
C
#ifndef _ASM_X86_I8259_H
|
|
#define _ASM_X86_I8259_H
|
|
|
|
#include <linux/delay.h>
|
|
|
|
extern unsigned int cached_irq_mask;
|
|
|
|
#define __byte(x, y) (((unsigned char *)&(y))[x])
|
|
#define cached_master_mask (__byte(0, cached_irq_mask))
|
|
#define cached_slave_mask (__byte(1, cached_irq_mask))
|
|
|
|
/* i8259A PIC registers */
|
|
#define PIC_MASTER_CMD 0x20
|
|
#define PIC_MASTER_IMR 0x21
|
|
#define PIC_MASTER_ISR PIC_MASTER_CMD
|
|
#define PIC_MASTER_POLL PIC_MASTER_ISR
|
|
#define PIC_MASTER_OCW3 PIC_MASTER_ISR
|
|
#define PIC_SLAVE_CMD 0xa0
|
|
#define PIC_SLAVE_IMR 0xa1
|
|
|
|
/* i8259A PIC related value */
|
|
#define PIC_CASCADE_IR 2
|
|
#define MASTER_ICW4_DEFAULT 0x01
|
|
#define SLAVE_ICW4_DEFAULT 0x01
|
|
#define PIC_ICW4_AEOI 2
|
|
|
|
extern raw_spinlock_t i8259A_lock;
|
|
|
|
/* the PIC may need a careful delay on some platforms, hence specific calls */
|
|
static inline unsigned char inb_pic(unsigned int port)
|
|
{
|
|
unsigned char value = inb(port);
|
|
|
|
/*
|
|
* delay for some accesses to PIC on motherboard or in chipset
|
|
* must be at least one microsecond, so be safe here:
|
|
*/
|
|
udelay(2);
|
|
|
|
return value;
|
|
}
|
|
|
|
static inline void outb_pic(unsigned char value, unsigned int port)
|
|
{
|
|
outb(value, port);
|
|
/*
|
|
* delay for some accesses to PIC on motherboard or in chipset
|
|
* must be at least one microsecond, so be safe here:
|
|
*/
|
|
udelay(2);
|
|
}
|
|
|
|
extern struct irq_chip i8259A_chip;
|
|
|
|
struct legacy_pic {
|
|
int nr_legacy_irqs;
|
|
struct irq_chip *chip;
|
|
void (*mask)(unsigned int irq);
|
|
void (*unmask)(unsigned int irq);
|
|
void (*mask_all)(void);
|
|
void (*restore_mask)(void);
|
|
void (*init)(int auto_eoi);
|
|
int (*probe)(void);
|
|
int (*irq_pending)(unsigned int irq);
|
|
void (*make_irq)(unsigned int irq);
|
|
};
|
|
|
|
extern struct legacy_pic *legacy_pic;
|
|
extern struct legacy_pic null_legacy_pic;
|
|
|
|
static inline int nr_legacy_irqs(void)
|
|
{
|
|
return legacy_pic->nr_legacy_irqs;
|
|
}
|
|
|
|
#endif /* _ASM_X86_I8259_H */
|