Eryk Brol ae8f425840 drm/amd/display: Ensure DRR triggers in BP ... [Why] In the previous implementation DRR event sometimes came in during FP2 region which is a keep-out zone. This would cause the frame not to latch until the next frame which resulted in heavy flicker. To fix this we need to make sure that it triggers in the BP. [How] 1. Remove DRR programming during flip 2. Setup manual trigger for DRR event and trigger it after surface programming is complete Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-06-22 09:34:07 -05:00
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dcn20_dccg.c
dcn20_dccg.h
dcn20_dpp_cm.c	drm/amd/display: Add DCN2 DPP	2019-06-21 18:59:34 -05:00
dcn20_dpp.c	drm/amd/display: Add DCN2 DPP	2019-06-21 18:59:34 -05:00
dcn20_dpp.h	drm/amd/display: Add DCN2 DPP	2019-06-21 18:59:34 -05:00
dcn20_dsc.c	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00
dcn20_dsc.h	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00
dcn20_dwb_scl.c	drm/amd/display: Add DCN2 DWB	2019-06-21 18:59:35 -05:00
dcn20_dwb.c	drm/amd/display: Add DCN2 DWB	2019-06-21 18:59:35 -05:00
dcn20_dwb.h	drm/amd/display: Add DCN2 DWB	2019-06-21 18:59:35 -05:00
dcn20_hubbub.c	drm/amd/display: Add DCN2 HUBP and HUBBUB	2019-06-21 18:59:34 -05:00
dcn20_hubbub.h	drm/amd/display: Add DCN2 HUBP and HUBBUB	2019-06-21 18:59:34 -05:00
dcn20_hubp.c	drm/amd/display: Add DCN2 HUBP and HUBBUB	2019-06-21 18:59:34 -05:00
dcn20_hubp.h	drm/amd/display: Add DCN2 HUBP and HUBBUB	2019-06-21 18:59:34 -05:00
dcn20_hwseq.c	drm/amd/display: Program VTG params after programming Global Sync for DCN2	2019-06-22 09:34:07 -05:00
dcn20_hwseq.h	drm/amd/display: Add DCN2 HW Sequencer and Resource	2019-06-21 18:59:35 -05:00
dcn20_link_encoder.c	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00
dcn20_link_encoder.h	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00
dcn20_mmhubbub.c	drm/amd/display: Add DCN2 MMHUBBUB	2019-06-21 18:59:34 -05:00
dcn20_mmhubbub.h	drm/amd/display: Add DCN2 MMHUBBUB	2019-06-21 18:59:34 -05:00
dcn20_mpc.c	drm/amd/display: Add DCN2 MPC	2019-06-21 18:59:34 -05:00
dcn20_mpc.h	drm/amd/display: Add DCN2 MPC	2019-06-21 18:59:34 -05:00
dcn20_opp.c	drm/amd/display: Add DCN2 OPP	2019-06-21 18:59:34 -05:00
dcn20_opp.h	drm/amd/display: Add DCN2 OPP	2019-06-21 18:59:34 -05:00
dcn20_optc.c	drm/amd/display: Ensure DRR triggers in BP	2019-06-22 09:34:07 -05:00
dcn20_optc.h	drm/amd/display: Ensure DRR triggers in BP	2019-06-22 09:34:07 -05:00
dcn20_resource.c	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00
dcn20_resource.h	drm/amd/display: add fast_validate parameter to dcn20_validate_bandwidth	2019-06-22 09:34:07 -05:00
dcn20_stream_encoder.c	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00
dcn20_stream_encoder.h
dcn20_vmid.c	drm/amd/display: Add DCN2 VMID	2019-06-21 18:59:35 -05:00
dcn20_vmid.h	drm/amd/display: Add DCN2 VMID	2019-06-21 18:59:35 -05:00
Makefile	drm/amd/display: Add DSC support for Navi (v2)	2019-06-22 09:34:07 -05:00