mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 09:20:50 +07:00
323f99cbc3
This patch allows IOMMU users to determine whether the hardware and software support safe, isolated interrupt remapping. Not all Intel IOMMUs have the hardware, and the software for AMD is not there yet. Signed-off-by: Tom Lyon <pugs@cisco.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
127 lines
3.5 KiB
C
127 lines
3.5 KiB
C
/*
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* Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
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* Author: Joerg Roedel <joerg.roedel@amd.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __LINUX_IOMMU_H
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#define __LINUX_IOMMU_H
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#define IOMMU_READ (1)
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#define IOMMU_WRITE (2)
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#define IOMMU_CACHE (4) /* DMA cache coherency */
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struct device;
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struct iommu_domain {
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void *priv;
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};
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#define IOMMU_CAP_CACHE_COHERENCY 0x1
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#define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */
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struct iommu_ops {
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int (*domain_init)(struct iommu_domain *domain);
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void (*domain_destroy)(struct iommu_domain *domain);
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int (*attach_dev)(struct iommu_domain *domain, struct device *dev);
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void (*detach_dev)(struct iommu_domain *domain, struct device *dev);
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int (*map)(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, int gfp_order, int prot);
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int (*unmap)(struct iommu_domain *domain, unsigned long iova,
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int gfp_order);
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phys_addr_t (*iova_to_phys)(struct iommu_domain *domain,
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unsigned long iova);
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int (*domain_has_cap)(struct iommu_domain *domain,
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unsigned long cap);
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};
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#ifdef CONFIG_IOMMU_API
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extern void register_iommu(struct iommu_ops *ops);
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extern bool iommu_found(void);
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extern struct iommu_domain *iommu_domain_alloc(void);
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extern void iommu_domain_free(struct iommu_domain *domain);
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extern int iommu_attach_device(struct iommu_domain *domain,
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struct device *dev);
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extern void iommu_detach_device(struct iommu_domain *domain,
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struct device *dev);
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extern int iommu_map(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, int gfp_order, int prot);
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extern int iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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int gfp_order);
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extern phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
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unsigned long iova);
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extern int iommu_domain_has_cap(struct iommu_domain *domain,
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unsigned long cap);
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#else /* CONFIG_IOMMU_API */
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static inline void register_iommu(struct iommu_ops *ops)
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{
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}
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static inline bool iommu_found(void)
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{
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return false;
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}
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static inline struct iommu_domain *iommu_domain_alloc(void)
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{
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return NULL;
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}
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static inline void iommu_domain_free(struct iommu_domain *domain)
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{
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}
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static inline int iommu_attach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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return -ENODEV;
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}
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static inline void iommu_detach_device(struct iommu_domain *domain,
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struct device *dev)
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{
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}
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static inline int iommu_map(struct iommu_domain *domain, unsigned long iova,
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phys_addr_t paddr, int gfp_order, int prot)
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{
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return -ENODEV;
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}
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static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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int gfp_order)
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{
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return -ENODEV;
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}
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static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
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unsigned long iova)
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{
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return 0;
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}
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static inline int domain_has_cap(struct iommu_domain *domain,
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unsigned long cap)
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{
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return 0;
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}
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#endif /* CONFIG_IOMMU_API */
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#endif /* __LINUX_IOMMU_H */
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