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This describes the ASPEED BMC SoC's display controller. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://patchwork.freedesktop.org/patch/msgid/20190403001909.31637-2-joel@jms.id.au
42 lines
1.1 KiB
Plaintext
42 lines
1.1 KiB
Plaintext
Device tree configuration for the GFX display device on the ASPEED SoCs
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Required properties:
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- compatible
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* Must be one of the following:
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+ aspeed,ast2500-gfx
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+ aspeed,ast2400-gfx
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* In addition, the ASPEED pinctrl bindings require the 'syscon' property to
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be present
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- reg: Physical base address and length of the GFX registers
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- interrupts: interrupt number for the GFX device
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- clocks: clock number used to generate the pixel clock
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- resets: reset line that must be released to use the GFX device
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- memory-region:
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Phandle to a memory region to allocate from, as defined in
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Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
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Example:
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gfx: display@1e6e6000 {
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compatible = "aspeed,ast2500-gfx", "syscon";
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reg = <0x1e6e6000 0x1000>;
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reg-io-width = <4>;
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clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
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resets = <&syscon ASPEED_RESET_CRT1>;
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interrupts = <0x19>;
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memory-region = <&gfx_memory>;
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};
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gfx_memory: framebuffer {
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size = <0x01000000>;
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alignment = <0x01000000>;
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compatible = "shared-dma-pool";
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reusable;
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};
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