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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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b448a266cc
Rename all structures that are used directly by firmware to have a nvfw_ prefix. This makes it easier to identify structures that have a fixed, specific layout. A future patch will define several more such structures, so it's important to be consistent now. Signed-off-by: Timur Tabi <ttabi@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
215 lines
5.5 KiB
C
215 lines
5.5 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "qmgr.h"
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static bool
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nvkm_falcon_cmdq_has_room(struct nvkm_falcon_cmdq *cmdq, u32 size, bool *rewind)
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{
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u32 head = nvkm_falcon_rd32(cmdq->qmgr->falcon, cmdq->head_reg);
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u32 tail = nvkm_falcon_rd32(cmdq->qmgr->falcon, cmdq->tail_reg);
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u32 free;
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size = ALIGN(size, QUEUE_ALIGNMENT);
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if (head >= tail) {
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free = cmdq->offset + cmdq->size - head;
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free -= HDR_SIZE;
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if (size > free) {
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*rewind = true;
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head = cmdq->offset;
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}
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}
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if (head < tail)
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free = tail - head - 1;
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return size <= free;
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}
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static void
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nvkm_falcon_cmdq_push(struct nvkm_falcon_cmdq *cmdq, void *data, u32 size)
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{
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struct nvkm_falcon *falcon = cmdq->qmgr->falcon;
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nvkm_falcon_load_dmem(falcon, data, cmdq->position, size, 0);
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cmdq->position += ALIGN(size, QUEUE_ALIGNMENT);
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}
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static void
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nvkm_falcon_cmdq_rewind(struct nvkm_falcon_cmdq *cmdq)
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{
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struct nvfw_falcon_cmd cmd;
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cmd.unit_id = NV_FALCON_CMD_UNIT_ID_REWIND;
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cmd.size = sizeof(cmd);
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nvkm_falcon_cmdq_push(cmdq, &cmd, cmd.size);
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cmdq->position = cmdq->offset;
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}
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static int
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nvkm_falcon_cmdq_open(struct nvkm_falcon_cmdq *cmdq, u32 size)
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{
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struct nvkm_falcon *falcon = cmdq->qmgr->falcon;
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bool rewind = false;
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mutex_lock(&cmdq->mutex);
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if (!nvkm_falcon_cmdq_has_room(cmdq, size, &rewind)) {
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FLCNQ_DBG(cmdq, "queue full");
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mutex_unlock(&cmdq->mutex);
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return -EAGAIN;
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}
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cmdq->position = nvkm_falcon_rd32(falcon, cmdq->head_reg);
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if (rewind)
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nvkm_falcon_cmdq_rewind(cmdq);
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return 0;
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}
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static void
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nvkm_falcon_cmdq_close(struct nvkm_falcon_cmdq *cmdq)
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{
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nvkm_falcon_wr32(cmdq->qmgr->falcon, cmdq->head_reg, cmdq->position);
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mutex_unlock(&cmdq->mutex);
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}
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static int
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nvkm_falcon_cmdq_write(struct nvkm_falcon_cmdq *cmdq, struct nvfw_falcon_cmd *cmd)
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{
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static unsigned timeout = 2000;
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unsigned long end_jiffies = jiffies + msecs_to_jiffies(timeout);
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int ret = -EAGAIN;
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while (ret == -EAGAIN && time_before(jiffies, end_jiffies))
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ret = nvkm_falcon_cmdq_open(cmdq, cmd->size);
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if (ret) {
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FLCNQ_ERR(cmdq, "timeout waiting for queue space");
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return ret;
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}
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nvkm_falcon_cmdq_push(cmdq, cmd, cmd->size);
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nvkm_falcon_cmdq_close(cmdq);
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return ret;
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}
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/* specifies that we want to know the command status in the answer message */
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#define CMD_FLAGS_STATUS BIT(0)
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/* specifies that we want an interrupt when the answer message is queued */
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#define CMD_FLAGS_INTR BIT(1)
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int
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nvkm_falcon_cmdq_send(struct nvkm_falcon_cmdq *cmdq, struct nvfw_falcon_cmd *cmd,
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nvkm_falcon_qmgr_callback cb, void *priv,
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unsigned long timeout)
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{
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struct nvkm_falcon_qmgr_seq *seq;
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int ret;
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if (!wait_for_completion_timeout(&cmdq->ready,
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msecs_to_jiffies(1000))) {
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FLCNQ_ERR(cmdq, "timeout waiting for queue ready");
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return -ETIMEDOUT;
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}
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seq = nvkm_falcon_qmgr_seq_acquire(cmdq->qmgr);
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if (IS_ERR(seq))
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return PTR_ERR(seq);
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cmd->seq_id = seq->id;
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cmd->ctrl_flags = CMD_FLAGS_STATUS | CMD_FLAGS_INTR;
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seq->state = SEQ_STATE_USED;
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seq->async = !timeout;
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seq->callback = cb;
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seq->priv = priv;
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ret = nvkm_falcon_cmdq_write(cmdq, cmd);
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if (ret) {
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seq->state = SEQ_STATE_PENDING;
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nvkm_falcon_qmgr_seq_release(cmdq->qmgr, seq);
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return ret;
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}
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if (!seq->async) {
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if (!wait_for_completion_timeout(&seq->done, timeout)) {
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FLCNQ_ERR(cmdq, "timeout waiting for reply");
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return -ETIMEDOUT;
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}
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ret = seq->result;
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nvkm_falcon_qmgr_seq_release(cmdq->qmgr, seq);
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}
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return ret;
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}
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void
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nvkm_falcon_cmdq_fini(struct nvkm_falcon_cmdq *cmdq)
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{
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reinit_completion(&cmdq->ready);
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}
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void
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nvkm_falcon_cmdq_init(struct nvkm_falcon_cmdq *cmdq,
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u32 index, u32 offset, u32 size)
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{
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const struct nvkm_falcon_func *func = cmdq->qmgr->falcon->func;
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cmdq->head_reg = func->cmdq.head + index * func->cmdq.stride;
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cmdq->tail_reg = func->cmdq.tail + index * func->cmdq.stride;
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cmdq->offset = offset;
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cmdq->size = size;
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complete_all(&cmdq->ready);
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FLCNQ_DBG(cmdq, "initialised @ index %d offset 0x%08x size 0x%08x",
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index, cmdq->offset, cmdq->size);
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}
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void
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nvkm_falcon_cmdq_del(struct nvkm_falcon_cmdq **pcmdq)
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{
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struct nvkm_falcon_cmdq *cmdq = *pcmdq;
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if (cmdq) {
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kfree(*pcmdq);
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*pcmdq = NULL;
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}
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}
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int
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nvkm_falcon_cmdq_new(struct nvkm_falcon_qmgr *qmgr, const char *name,
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struct nvkm_falcon_cmdq **pcmdq)
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{
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struct nvkm_falcon_cmdq *cmdq = *pcmdq;
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if (!(cmdq = *pcmdq = kzalloc(sizeof(*cmdq), GFP_KERNEL)))
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return -ENOMEM;
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cmdq->qmgr = qmgr;
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cmdq->name = name;
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mutex_init(&cmdq->mutex);
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init_completion(&cmdq->ready);
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return 0;
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}
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