mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-12 14:36:41 +07:00
bd5a875d90
This is V3 of Emma Mobile EV2 SMP support. At this point only the most basic form of SMP operation is supported. TWD and CPU Hotplug support is excluded. Tied to both the Emma Mobile EV2 and the KZM9D board due to the need to switch on board in platsmp.c and the newly introduced need for static mappings. The static mappings are needed to allow hardware acces early during boot when SMP is initialized. This early requirement forces us to also map in the SMU registers. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
98 lines
2.4 KiB
C
98 lines
2.4 KiB
C
/*
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* SMP support for Emma Mobile EV2
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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* Copyright (C) 2012 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <mach/common.h>
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#include <mach/emev2.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#include <asm/hardware/gic.h>
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#include <asm/cacheflush.h>
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#define EMEV2_SCU_BASE 0x1e000000
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static DEFINE_SPINLOCK(scu_lock);
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static void __iomem *scu_base;
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static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
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{
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unsigned long tmp;
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/* we assume this code is running on a different cpu
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* than the one that is changing coherency setting */
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spin_lock(&scu_lock);
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tmp = readl(scu_base + 8);
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tmp &= ~clr;
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tmp |= set;
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writel(tmp, scu_base + 8);
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spin_unlock(&scu_lock);
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}
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unsigned int __init emev2_get_core_count(void)
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{
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if (!scu_base) {
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scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
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emev2_clock_init(); /* need ioremapped SMU */
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}
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WARN_ON_ONCE(!scu_base);
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return scu_base ? scu_get_core_count(scu_base) : 1;
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}
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int emev2_platform_cpu_kill(unsigned int cpu)
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{
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return 0; /* not supported yet */
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}
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void __cpuinit emev2_secondary_init(unsigned int cpu)
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{
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gic_secondary_init(0);
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}
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int __cpuinit emev2_boot_secondary(unsigned int cpu)
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{
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cpu = cpu_logical_map(cpu);
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/* enable cache coherency */
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modify_scu_cpu_psr(0, 3 << (cpu * 8));
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/* Tell ROM loader about our vector (in headsmp.S) */
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emev2_set_boot_vector(__pa(shmobile_secondary_vector));
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gic_raise_softirq(cpumask_of(cpu), 1);
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return 0;
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}
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void __init emev2_smp_prepare_cpus(void)
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{
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int cpu = cpu_logical_map(0);
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scu_enable(scu_base);
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/* enable cache coherency on CPU0 */
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modify_scu_cpu_psr(0, 3 << (cpu * 8));
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}
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