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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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84081bd220
If we fail to boot due to an unsupported processor ID, print the processor ID as part of the failure message. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
260 lines
6.5 KiB
ArmAsm
260 lines
6.5 KiB
ArmAsm
/*
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* linux/arch/arm/kernel/head-common.S
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*
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* Copyright (C) 1994-2002 Russell King
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* Copyright (c) 2003 ARM Limited
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#define ATAG_CORE 0x54410001
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#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
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.type __switch_data, %object
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__switch_data:
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.long __mmap_switched
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.long __data_loc @ r4
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.long __data_start @ r5
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.long __bss_start @ r6
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.long _end @ r7
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.long processor_id @ r4
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.long __machine_arch_type @ r5
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.long __atags_pointer @ r6
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.long cr_alignment @ r7
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.long init_thread_union + THREAD_START_SP @ sp
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/*
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* The following fragment of code is executed with the MMU on in MMU mode,
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* and uses absolute addresses; this is not position independent.
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*
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* r0 = cp#15 control register
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* r1 = machine ID
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* r2 = atags pointer
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* r9 = processor ID
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*/
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.type __mmap_switched, %function
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__mmap_switched:
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adr r3, __switch_data + 4
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ldmia r3!, {r4, r5, r6, r7}
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cmp r4, r5 @ Copy data segment if needed
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1: cmpne r5, r6
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ldrne fp, [r4], #4
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strne fp, [r5], #4
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bne 1b
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mov fp, #0 @ Clear BSS (and zero fp)
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1: cmp r6, r7
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strcc fp, [r6],#4
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bcc 1b
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ldmia r3, {r4, r5, r6, r7, sp}
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str r9, [r4] @ Save processor ID
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str r1, [r5] @ Save machine type
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str r2, [r6] @ Save atags pointer
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bic r4, r0, #CR_A @ Clear 'A' bit
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stmia r7, {r0, r4} @ Save control register values
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b start_kernel
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/*
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* Exception handling. Something went wrong and we can't proceed. We
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* ought to tell the user, but since we don't have any guarantee that
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* we're even running on the right architecture, we do virtually nothing.
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*
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* If CONFIG_DEBUG_LL is set we try to print out something about the error
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* and hope for the best (useful if bootloader fails to pass a proper
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* machine ID for example).
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*/
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.type __error_p, %function
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__error_p:
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#ifdef CONFIG_DEBUG_LL
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adr r0, str_p1
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bl printascii
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mov r0, r9
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bl printhex8
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adr r0, str_p2
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bl printascii
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b __error
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str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x"
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str_p2: .asciz ").\n"
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.align
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#endif
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.type __error_a, %function
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__error_a:
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#ifdef CONFIG_DEBUG_LL
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mov r4, r1 @ preserve machine ID
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adr r0, str_a1
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bl printascii
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mov r0, r4
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bl printhex8
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adr r0, str_a2
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bl printascii
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adr r3, 3f
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ldmia r3, {r4, r5, r6} @ get machine desc list
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sub r4, r3, r4 @ get offset between virt&phys
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add r5, r5, r4 @ convert virt addresses to
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add r6, r6, r4 @ physical address space
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1: ldr r0, [r5, #MACHINFO_TYPE] @ get machine type
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bl printhex8
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mov r0, #'\t'
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bl printch
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ldr r0, [r5, #MACHINFO_NAME] @ get machine name
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add r0, r0, r4
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bl printascii
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mov r0, #'\n'
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bl printch
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add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
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cmp r5, r6
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blo 1b
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adr r0, str_a3
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bl printascii
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b __error
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str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x"
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str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n"
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str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n"
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.align
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#endif
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.type __error, %function
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__error:
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#ifdef CONFIG_ARCH_RPC
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/*
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* Turn the screen red on a error - RiscPC only.
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*/
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mov r0, #0x02000000
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mov r3, #0x11
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orr r3, r3, r3, lsl #8
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orr r3, r3, r3, lsl #16
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str r3, [r0], #4
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str r3, [r0], #4
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str r3, [r0], #4
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str r3, [r0], #4
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#endif
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1: mov r0, r0
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b 1b
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/*
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* Read processor ID register (CP#15, CR0), and look up in the linker-built
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* supported processor list. Note that we can't use the absolute addresses
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* for the __proc_info lists since we aren't running with the MMU on
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* (and therefore, we are not in the correct address space). We have to
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* calculate the offset.
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*
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* r9 = cpuid
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* Returns:
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* r3, r4, r6 corrupted
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* r5 = proc_info pointer in physical address space
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* r9 = cpuid (preserved)
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*/
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.type __lookup_processor_type, %function
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__lookup_processor_type:
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adr r3, 3f
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ldmda r3, {r5 - r7}
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sub r3, r3, r7 @ get offset between virt&phys
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add r5, r5, r3 @ convert virt addresses to
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add r6, r6, r3 @ physical address space
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1: ldmia r5, {r3, r4} @ value, mask
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and r4, r4, r9 @ mask wanted bits
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teq r3, r4
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beq 2f
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add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list)
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cmp r5, r6
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blo 1b
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mov r5, #0 @ unknown processor
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2: mov pc, lr
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/*
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* This provides a C-API version of the above function.
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*/
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ENTRY(lookup_processor_type)
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stmfd sp!, {r4 - r7, r9, lr}
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mov r9, r0
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bl __lookup_processor_type
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mov r0, r5
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ldmfd sp!, {r4 - r7, r9, pc}
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/*
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* Look in include/asm-arm/procinfo.h and arch/arm/kernel/arch.[ch] for
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* more information about the __proc_info and __arch_info structures.
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*/
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.long __proc_info_begin
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.long __proc_info_end
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3: .long .
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.long __arch_info_begin
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.long __arch_info_end
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/*
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* Lookup machine architecture in the linker-build list of architectures.
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* Note that we can't use the absolute addresses for the __arch_info
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* lists since we aren't running with the MMU on (and therefore, we are
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* not in the correct address space). We have to calculate the offset.
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*
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* r1 = machine architecture number
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* Returns:
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* r3, r4, r6 corrupted
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* r5 = mach_info pointer in physical address space
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*/
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.type __lookup_machine_type, %function
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__lookup_machine_type:
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adr r3, 3b
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ldmia r3, {r4, r5, r6}
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sub r3, r3, r4 @ get offset between virt&phys
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add r5, r5, r3 @ convert virt addresses to
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add r6, r6, r3 @ physical address space
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1: ldr r3, [r5, #MACHINFO_TYPE] @ get machine type
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teq r3, r1 @ matches loader number?
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beq 2f @ found
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add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc
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cmp r5, r6
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blo 1b
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mov r5, #0 @ unknown machine
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2: mov pc, lr
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/*
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* This provides a C-API version of the above function.
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*/
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ENTRY(lookup_machine_type)
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stmfd sp!, {r4 - r6, lr}
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mov r1, r0
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bl __lookup_machine_type
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mov r0, r5
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ldmfd sp!, {r4 - r6, pc}
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/* Determine validity of the r2 atags pointer. The heuristic requires
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* that the pointer be aligned, in the first 16k of physical RAM and
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* that the ATAG_CORE marker is first and present. Future revisions
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* of this function may be more lenient with the physical address and
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* may also be able to move the ATAGS block if necessary.
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*
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* r8 = machinfo
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*
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* Returns:
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* r2 either valid atags pointer, or zero
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* r5, r6 corrupted
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*/
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.type __vet_atags, %function
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__vet_atags:
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tst r2, #0x3 @ aligned?
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bne 1f
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ldr r5, [r2, #0] @ is first tag ATAG_CORE?
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subs r5, r5, #ATAG_CORE_SIZE
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bne 1f
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ldr r5, [r2, #4]
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ldr r6, =ATAG_CORE
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cmp r5, r6
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bne 1f
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mov pc, lr @ atag pointer is ok
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1: mov r2, #0
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mov pc, lr
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