Chris Wilson add284a3a2 drm/i915: Force the CS stall for invalidate flushes ... In order to act as a full command barrier by itself, we need to tell the pipecontrol to actually stall the command streamer while the flush runs. We require the full command barrier before operations like MI_SET_CONTEXT, which currently rely on a prior invalidate flush. References: https://bugs.freedesktop.org/show_bug.cgi?id=83677 Cc: Simon Farnsworth <simon@farnz.org.uk> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: stable@vger.kernel.org Signed-off-by: Jani Nikula <jani.nikula@intel.com>		2014-12-16 15:06:48 +02:00
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drm	drm/i915: Force the CS stall for invalidate flushes	2014-12-16 15:06:48 +02:00
host1x	gpu: host1x: mipi: Set MIPI_CAL_BIAS_PAD_CFG1 register	2014-11-13 16:11:57 +01:00
ipu-v3	IPUv3 fixes for v3.18	2014-10-07 14:31:14 +10:00
vga	Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip	2014-10-13 16:23:15 +02:00
Makefile	gpu: ipu-v3: Move i.MX IPUv3 core driver out of staging	2014-06-04 11:06:52 +02:00