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9d12ba86f8
Add Broadcom Secure Processing Unit (SPU) crypto driver for SPU hardware crypto offload. The driver supports ablkcipher, ahash, and aead symmetric crypto operations. Signed-off-by: Steve Lin <steven.lin1@broadcom.com> Signed-off-by: Rob Rice <rob.rice@broadcom.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
484 lines
14 KiB
C
484 lines
14 KiB
C
/*
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* Copyright 2016 Broadcom
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation (the "GPL").
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License version 2 (GPLv2) for more details.
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*
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* You should have received a copy of the GNU General Public License
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* version 2 (GPLv2) along with this source code.
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*/
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#ifndef _CIPHER_H
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#define _CIPHER_H
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#include <linux/atomic.h>
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#include <linux/mailbox/brcm-message.h>
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#include <linux/mailbox_client.h>
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#include <crypto/aes.h>
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#include <crypto/internal/hash.h>
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#include <crypto/aead.h>
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#include <crypto/sha.h>
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#include <crypto/sha3.h>
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#include "spu.h"
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#include "spum.h"
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#include "spu2.h"
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/* Driver supports up to MAX_SPUS SPU blocks */
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#define MAX_SPUS 16
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#define ARC4_MIN_KEY_SIZE 1
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#define ARC4_MAX_KEY_SIZE 256
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#define ARC4_BLOCK_SIZE 1
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#define ARC4_STATE_SIZE 4
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#define CCM_AES_IV_SIZE 16
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#define GCM_AES_IV_SIZE 12
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#define GCM_ESP_IV_SIZE 8
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#define CCM_ESP_IV_SIZE 8
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#define RFC4543_ICV_SIZE 16
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#define MAX_KEY_SIZE ARC4_MAX_KEY_SIZE
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#define MAX_IV_SIZE AES_BLOCK_SIZE
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#define MAX_DIGEST_SIZE SHA3_512_DIGEST_SIZE
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#define MAX_ASSOC_SIZE 512
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/* size of salt value for AES-GCM-ESP and AES-CCM-ESP */
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#define GCM_ESP_SALT_SIZE 4
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#define CCM_ESP_SALT_SIZE 3
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#define MAX_SALT_SIZE GCM_ESP_SALT_SIZE
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#define GCM_ESP_SALT_OFFSET 0
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#define CCM_ESP_SALT_OFFSET 1
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#define GCM_ESP_DIGESTSIZE 16
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#define MAX_HASH_BLOCK_SIZE SHA512_BLOCK_SIZE
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/*
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* Maximum number of bytes from a non-final hash request that can be deferred
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* until more data is available. With new crypto API framework, this
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* can be no more than one block of data.
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*/
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#define HASH_CARRY_MAX MAX_HASH_BLOCK_SIZE
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/* Force at least 4-byte alignment of all SPU message fields */
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#define SPU_MSG_ALIGN 4
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/* Number of times to resend mailbox message if mb queue is full */
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#define SPU_MB_RETRY_MAX 1000
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/* op_counts[] indexes */
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enum op_type {
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SPU_OP_CIPHER,
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SPU_OP_HASH,
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SPU_OP_HMAC,
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SPU_OP_AEAD,
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SPU_OP_NUM
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};
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enum spu_spu_type {
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SPU_TYPE_SPUM,
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SPU_TYPE_SPU2,
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};
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/*
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* SPUM_NS2 and SPUM_NSP are the SPU-M block on Northstar 2 and Northstar Plus,
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* respectively.
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*/
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enum spu_spu_subtype {
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SPU_SUBTYPE_SPUM_NS2,
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SPU_SUBTYPE_SPUM_NSP,
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SPU_SUBTYPE_SPU2_V1,
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SPU_SUBTYPE_SPU2_V2
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};
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struct spu_type_subtype {
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enum spu_spu_type type;
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enum spu_spu_subtype subtype;
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};
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struct cipher_op {
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enum spu_cipher_alg alg;
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enum spu_cipher_mode mode;
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};
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struct auth_op {
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enum hash_alg alg;
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enum hash_mode mode;
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};
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struct iproc_alg_s {
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u32 type;
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union {
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struct crypto_alg crypto;
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struct ahash_alg hash;
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struct aead_alg aead;
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} alg;
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struct cipher_op cipher_info;
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struct auth_op auth_info;
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bool auth_first;
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bool registered;
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};
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/*
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* Buffers for a SPU request/reply message pair. All part of one structure to
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* allow a single alloc per request.
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*/
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struct spu_msg_buf {
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/* Request message fragments */
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/*
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* SPU request message header. For SPU-M, holds MH, EMH, SCTX, BDESC,
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* and BD header. For SPU2, holds FMD, OMD.
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*/
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u8 bcm_spu_req_hdr[ALIGN(SPU2_HEADER_ALLOC_LEN, SPU_MSG_ALIGN)];
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/* IV or counter. Size to include salt. Also used for XTS tweek. */
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u8 iv_ctr[ALIGN(2 * AES_BLOCK_SIZE, SPU_MSG_ALIGN)];
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/* Hash digest. request and response. */
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u8 digest[ALIGN(MAX_DIGEST_SIZE, SPU_MSG_ALIGN)];
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/* SPU request message padding */
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u8 spu_req_pad[ALIGN(SPU_PAD_LEN_MAX, SPU_MSG_ALIGN)];
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/* SPU-M request message STATUS field */
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u8 tx_stat[ALIGN(SPU_TX_STATUS_LEN, SPU_MSG_ALIGN)];
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/* Response message fragments */
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/* SPU response message header */
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u8 spu_resp_hdr[ALIGN(SPU2_HEADER_ALLOC_LEN, SPU_MSG_ALIGN)];
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/* SPU response message STATUS field padding */
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u8 rx_stat_pad[ALIGN(SPU_STAT_PAD_MAX, SPU_MSG_ALIGN)];
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/* SPU response message STATUS field */
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u8 rx_stat[ALIGN(SPU_RX_STATUS_LEN, SPU_MSG_ALIGN)];
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union {
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/* Buffers only used for ablkcipher */
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struct {
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/*
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* Field used for either SUPDT when RC4 is used
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* -OR- tweak value when XTS/AES is used
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*/
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u8 supdt_tweak[ALIGN(SPU_SUPDT_LEN, SPU_MSG_ALIGN)];
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} c;
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/* Buffers only used for aead */
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struct {
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/* SPU response pad for GCM data */
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u8 gcmpad[ALIGN(AES_BLOCK_SIZE, SPU_MSG_ALIGN)];
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/* SPU request msg padding for GCM AAD */
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u8 req_aad_pad[ALIGN(SPU_PAD_LEN_MAX, SPU_MSG_ALIGN)];
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/* SPU response data to be discarded */
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u8 resp_aad[ALIGN(MAX_ASSOC_SIZE + MAX_IV_SIZE,
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SPU_MSG_ALIGN)];
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} a;
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};
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};
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struct iproc_ctx_s {
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u8 enckey[MAX_KEY_SIZE + ARC4_STATE_SIZE];
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unsigned int enckeylen;
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u8 authkey[MAX_KEY_SIZE + ARC4_STATE_SIZE];
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unsigned int authkeylen;
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u8 salt[MAX_SALT_SIZE];
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unsigned int salt_len;
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unsigned int salt_offset;
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u8 iv[MAX_IV_SIZE];
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unsigned int digestsize;
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struct iproc_alg_s *alg;
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bool is_esp;
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struct cipher_op cipher;
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enum spu_cipher_type cipher_type;
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struct auth_op auth;
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bool auth_first;
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/*
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* The maximum length in bytes of the payload in a SPU message for this
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* context. For SPU-M, the payload is the combination of AAD and data.
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* For SPU2, the payload is just data. A value of SPU_MAX_PAYLOAD_INF
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* indicates that there is no limit to the length of the SPU message
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* payload.
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*/
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unsigned int max_payload;
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struct crypto_aead *fallback_cipher;
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/* auth_type is determined during processing of request */
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u8 ipad[MAX_HASH_BLOCK_SIZE];
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u8 opad[MAX_HASH_BLOCK_SIZE];
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/*
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* Buffer to hold SPU message header template. Template is created at
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* setkey time for ablkcipher requests, since most of the fields in the
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* header are known at that time. At request time, just fill in a few
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* missing pieces related to length of data in the request and IVs, etc.
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*/
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u8 bcm_spu_req_hdr[ALIGN(SPU2_HEADER_ALLOC_LEN, SPU_MSG_ALIGN)];
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/* Length of SPU request header */
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u16 spu_req_hdr_len;
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/* Expected length of SPU response header */
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u16 spu_resp_hdr_len;
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/*
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* shash descriptor - needed to perform incremental hashing in
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* in software, when hw doesn't support it.
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*/
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struct shash_desc *shash;
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bool is_rfc4543; /* RFC 4543 style of GMAC */
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};
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/* state from iproc_reqctx_s necessary for hash state export/import */
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struct spu_hash_export_s {
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unsigned int total_todo;
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unsigned int total_sent;
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u8 hash_carry[HASH_CARRY_MAX];
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unsigned int hash_carry_len;
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u8 incr_hash[MAX_DIGEST_SIZE];
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bool is_sw_hmac;
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};
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struct iproc_reqctx_s {
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/* general context */
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struct crypto_async_request *parent;
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/* only valid after enqueue() */
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struct iproc_ctx_s *ctx;
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u8 chan_idx; /* Mailbox channel to be used to submit this request */
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/* total todo, rx'd, and sent for this request */
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unsigned int total_todo;
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unsigned int total_received; /* only valid for ablkcipher */
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unsigned int total_sent;
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/*
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* num bytes sent to hw from the src sg in this request. This can differ
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* from total_sent for incremental hashing. total_sent includes previous
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* init() and update() data. src_sent does not.
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*/
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unsigned int src_sent;
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/*
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* For AEAD requests, start of associated data. This will typically
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* point to the beginning of the src scatterlist from the request,
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* since assoc data is at the beginning of the src scatterlist rather
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* than in its own sg.
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*/
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struct scatterlist *assoc;
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/*
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* scatterlist entry and offset to start of data for next chunk. Crypto
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* API src scatterlist for AEAD starts with AAD, if present. For first
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* chunk, src_sg is sg entry at beginning of input data (after AAD).
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* src_skip begins at the offset in that sg entry where data begins.
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*/
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struct scatterlist *src_sg;
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int src_nents; /* Number of src entries with data */
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u32 src_skip; /* bytes of current sg entry already used */
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/*
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* Same for destination. For AEAD, if there is AAD, output data must
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* be written at offset following AAD.
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*/
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struct scatterlist *dst_sg;
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int dst_nents; /* Number of dst entries with data */
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u32 dst_skip; /* bytes of current sg entry already written */
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/* Mailbox message used to send this request to PDC driver */
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struct brcm_message mb_mssg;
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bool bd_suppress; /* suppress BD field in SPU response? */
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/* cipher context */
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bool is_encrypt;
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/*
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* CBC mode: IV. CTR mode: counter. Else empty. Used as a DMA
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* buffer for AEAD requests. So allocate as DMAable memory. If IV
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* concatenated with salt, includes the salt.
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*/
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u8 *iv_ctr;
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/* Length of IV or counter, in bytes */
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unsigned int iv_ctr_len;
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/*
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* Hash requests can be of any size, whether initial, update, or final.
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* A non-final request must be submitted to the SPU as an integral
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* number of blocks. This may leave data at the end of the request
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* that is not a full block. Since the request is non-final, it cannot
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* be padded. So, we write the remainder to this hash_carry buffer and
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* hold it until the next request arrives. The carry data is then
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* submitted at the beginning of the data in the next SPU msg.
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* hash_carry_len is the number of bytes currently in hash_carry. These
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* fields are only used for ahash requests.
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*/
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u8 hash_carry[HASH_CARRY_MAX];
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unsigned int hash_carry_len;
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unsigned int is_final; /* is this the final for the hash op? */
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/*
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* Digest from incremental hash is saved here to include in next hash
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* operation. Cannot be stored in req->result for truncated hashes,
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* since result may be sized for final digest. Cannot be saved in
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* msg_buf because that gets deleted between incremental hash ops
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* and is not saved as part of export().
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*/
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u8 incr_hash[MAX_DIGEST_SIZE];
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/* hmac context */
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bool is_sw_hmac;
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/* aead context */
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struct crypto_tfm *old_tfm;
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crypto_completion_t old_complete;
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void *old_data;
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gfp_t gfp;
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/* Buffers used to build SPU request and response messages */
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struct spu_msg_buf msg_buf;
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};
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/*
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* Structure encapsulates a set of function pointers specific to the type of
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* SPU hardware running. These functions handling creation and parsing of
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* SPU request messages and SPU response messages. Includes hardware-specific
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* values read from device tree.
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*/
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struct spu_hw {
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void (*spu_dump_msg_hdr)(u8 *buf, unsigned int buf_len);
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u32 (*spu_ctx_max_payload)(enum spu_cipher_alg cipher_alg,
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enum spu_cipher_mode cipher_mode,
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unsigned int blocksize);
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u32 (*spu_payload_length)(u8 *spu_hdr);
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u16 (*spu_response_hdr_len)(u16 auth_key_len, u16 enc_key_len,
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bool is_hash);
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u16 (*spu_hash_pad_len)(enum hash_alg hash_alg,
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enum hash_mode hash_mode, u32 chunksize,
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u16 hash_block_size);
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u32 (*spu_gcm_ccm_pad_len)(enum spu_cipher_mode cipher_mode,
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unsigned int data_size);
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u32 (*spu_assoc_resp_len)(enum spu_cipher_mode cipher_mode,
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unsigned int assoc_len,
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unsigned int iv_len, bool is_encrypt);
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u8 (*spu_aead_ivlen)(enum spu_cipher_mode cipher_mode,
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u16 iv_len);
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enum hash_type (*spu_hash_type)(u32 src_sent);
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u32 (*spu_digest_size)(u32 digest_size, enum hash_alg alg,
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enum hash_type);
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u32 (*spu_create_request)(u8 *spu_hdr,
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struct spu_request_opts *req_opts,
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struct spu_cipher_parms *cipher_parms,
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struct spu_hash_parms *hash_parms,
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struct spu_aead_parms *aead_parms,
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unsigned int data_size);
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u16 (*spu_cipher_req_init)(u8 *spu_hdr,
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struct spu_cipher_parms *cipher_parms);
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void (*spu_cipher_req_finish)(u8 *spu_hdr,
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u16 spu_req_hdr_len,
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unsigned int is_inbound,
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struct spu_cipher_parms *cipher_parms,
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bool update_key,
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unsigned int data_size);
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void (*spu_request_pad)(u8 *pad_start, u32 gcm_padding,
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u32 hash_pad_len, enum hash_alg auth_alg,
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enum hash_mode auth_mode,
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unsigned int total_sent, u32 status_padding);
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u8 (*spu_xts_tweak_in_payload)(void);
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u8 (*spu_tx_status_len)(void);
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u8 (*spu_rx_status_len)(void);
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int (*spu_status_process)(u8 *statp);
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void (*spu_ccm_update_iv)(unsigned int digestsize,
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struct spu_cipher_parms *cipher_parms,
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unsigned int assoclen, unsigned int chunksize,
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bool is_encrypt, bool is_esp);
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u32 (*spu_wordalign_padlen)(u32 data_size);
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/* The base virtual address of the SPU hw registers */
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void __iomem *reg_vbase[MAX_SPUS];
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/* Version of the SPU hardware */
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enum spu_spu_type spu_type;
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/* Sub-version of the SPU hardware */
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enum spu_spu_subtype spu_subtype;
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/* The number of SPUs on this platform */
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u32 num_spu;
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};
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struct device_private {
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struct platform_device *pdev[MAX_SPUS];
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struct spu_hw spu;
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atomic_t session_count; /* number of streams active */
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atomic_t stream_count; /* monotonic counter for streamID's */
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/* Length of BCM header. Set to 0 when hw does not expect BCM HEADER. */
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u8 bcm_hdr_len;
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/* The index of the channel to use for the next crypto request */
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atomic_t next_chan;
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struct dentry *debugfs_dir;
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struct dentry *debugfs_stats;
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/* Number of request bytes processed and result bytes returned */
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atomic64_t bytes_in;
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atomic64_t bytes_out;
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/* Number of operations of each type */
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atomic_t op_counts[SPU_OP_NUM];
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atomic_t cipher_cnt[CIPHER_ALG_LAST][CIPHER_MODE_LAST];
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atomic_t hash_cnt[HASH_ALG_LAST];
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atomic_t hmac_cnt[HASH_ALG_LAST];
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atomic_t aead_cnt[AEAD_TYPE_LAST];
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/* Number of calls to setkey() for each operation type */
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atomic_t setkey_cnt[SPU_OP_NUM];
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/* Number of times request was resubmitted because mb was full */
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atomic_t mb_no_spc;
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/* Number of mailbox send failures */
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atomic_t mb_send_fail;
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/* Number of ICV check failures for AEAD messages */
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atomic_t bad_icv;
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struct mbox_client mcl[MAX_SPUS];
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/* Array of mailbox channel pointers, one for each channel */
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struct mbox_chan *mbox[MAX_SPUS];
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/* Driver initialized */
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bool inited;
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};
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extern struct device_private iproc_priv;
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#endif
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