mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 23:40:55 +07:00
b37ed4a3e5
Add DT property to tell the MAX8907 that it should provide the pm_power_off() implementation. This allows "shutdown" to work. Signed-off-by: Stephen Warren <swarren@nvidia.com>
597 lines
13 KiB
Plaintext
597 lines
13 KiB
Plaintext
/dts-v1/;
|
|
|
|
/include/ "tegra20.dtsi"
|
|
|
|
/ {
|
|
model = "NVIDIA Tegra2 Whistler evaluation board";
|
|
compatible = "nvidia,whistler", "nvidia,tegra20";
|
|
|
|
memory {
|
|
reg = <0x00000000 0x20000000>;
|
|
};
|
|
|
|
pinmux {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&state_default>;
|
|
|
|
state_default: pinmux {
|
|
ata {
|
|
nvidia,pins = "ata", "atb", "ate", "gma", "gmb",
|
|
"gmc", "gmd", "gpu";
|
|
nvidia,function = "gmi";
|
|
};
|
|
atc {
|
|
nvidia,pins = "atc", "atd";
|
|
nvidia,function = "sdio4";
|
|
};
|
|
cdev1 {
|
|
nvidia,pins = "cdev1";
|
|
nvidia,function = "plla_out";
|
|
};
|
|
cdev2 {
|
|
nvidia,pins = "cdev2";
|
|
nvidia,function = "osc";
|
|
};
|
|
crtp {
|
|
nvidia,pins = "crtp";
|
|
nvidia,function = "crt";
|
|
};
|
|
csus {
|
|
nvidia,pins = "csus";
|
|
nvidia,function = "vi_sensor_clk";
|
|
};
|
|
dap1 {
|
|
nvidia,pins = "dap1";
|
|
nvidia,function = "dap1";
|
|
};
|
|
dap2 {
|
|
nvidia,pins = "dap2";
|
|
nvidia,function = "dap2";
|
|
};
|
|
dap3 {
|
|
nvidia,pins = "dap3";
|
|
nvidia,function = "dap3";
|
|
};
|
|
dap4 {
|
|
nvidia,pins = "dap4";
|
|
nvidia,function = "dap4";
|
|
};
|
|
ddc {
|
|
nvidia,pins = "ddc";
|
|
nvidia,function = "i2c2";
|
|
};
|
|
dta {
|
|
nvidia,pins = "dta", "dtb", "dtc", "dtd";
|
|
nvidia,function = "vi";
|
|
};
|
|
dte {
|
|
nvidia,pins = "dte";
|
|
nvidia,function = "rsvd1";
|
|
};
|
|
dtf {
|
|
nvidia,pins = "dtf";
|
|
nvidia,function = "i2c3";
|
|
};
|
|
gme {
|
|
nvidia,pins = "gme";
|
|
nvidia,function = "dap5";
|
|
};
|
|
gpu7 {
|
|
nvidia,pins = "gpu7";
|
|
nvidia,function = "rtck";
|
|
};
|
|
gpv {
|
|
nvidia,pins = "gpv";
|
|
nvidia,function = "pcie";
|
|
};
|
|
hdint {
|
|
nvidia,pins = "hdint", "pta";
|
|
nvidia,function = "hdmi";
|
|
};
|
|
i2cp {
|
|
nvidia,pins = "i2cp";
|
|
nvidia,function = "i2cp";
|
|
};
|
|
irrx {
|
|
nvidia,pins = "irrx", "irtx";
|
|
nvidia,function = "uartb";
|
|
};
|
|
kbca {
|
|
nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
|
|
nvidia,function = "kbc";
|
|
};
|
|
kbcb {
|
|
nvidia,pins = "kbcb", "kbcd";
|
|
nvidia,function = "sdio2";
|
|
};
|
|
lcsn {
|
|
nvidia,pins = "lcsn", "lsck", "lsda", "lsdi",
|
|
"spia", "spib", "spic";
|
|
nvidia,function = "spi3";
|
|
};
|
|
ld0 {
|
|
nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
|
|
"ld5", "ld6", "ld7", "ld8", "ld9",
|
|
"ld10", "ld11", "ld12", "ld13", "ld14",
|
|
"ld15", "ld16", "ld17", "ldc", "ldi",
|
|
"lhp0", "lhp1", "lhp2", "lhs", "lm0",
|
|
"lm1", "lpp", "lpw0", "lpw1", "lpw2",
|
|
"lsc0", "lsc1", "lspi", "lvp0", "lvp1",
|
|
"lvs";
|
|
nvidia,function = "displaya";
|
|
};
|
|
owc {
|
|
nvidia,pins = "owc", "uac";
|
|
nvidia,function = "owr";
|
|
};
|
|
pmc {
|
|
nvidia,pins = "pmc";
|
|
nvidia,function = "pwr_on";
|
|
};
|
|
rm {
|
|
nvidia,pins = "rm";
|
|
nvidia,function = "i2c1";
|
|
};
|
|
sdb {
|
|
nvidia,pins = "sdb", "sdc", "sdd", "slxa",
|
|
"slxc", "slxd", "slxk";
|
|
nvidia,function = "sdio3";
|
|
};
|
|
sdio1 {
|
|
nvidia,pins = "sdio1";
|
|
nvidia,function = "sdio1";
|
|
};
|
|
spdi {
|
|
nvidia,pins = "spdi", "spdo";
|
|
nvidia,function = "rsvd2";
|
|
};
|
|
spid {
|
|
nvidia,pins = "spid", "spie", "spig", "spih";
|
|
nvidia,function = "spi2_alt";
|
|
};
|
|
spif {
|
|
nvidia,pins = "spif";
|
|
nvidia,function = "spi2";
|
|
};
|
|
uaa {
|
|
nvidia,pins = "uaa", "uab";
|
|
nvidia,function = "uarta";
|
|
};
|
|
uad {
|
|
nvidia,pins = "uad";
|
|
nvidia,function = "irda";
|
|
};
|
|
uca {
|
|
nvidia,pins = "uca", "ucb";
|
|
nvidia,function = "uartc";
|
|
};
|
|
uda {
|
|
nvidia,pins = "uda";
|
|
nvidia,function = "spi1";
|
|
};
|
|
conf_ata {
|
|
nvidia,pins = "ata", "atb", "atc", "ddc", "gma",
|
|
"gmb", "gmc", "gmd", "irrx", "irtx",
|
|
"kbca", "kbcb", "kbcc", "kbcd", "kbce",
|
|
"kbcf", "sdc", "sdd", "spie", "spig",
|
|
"spih", "uaa", "uab", "uad", "uca",
|
|
"ucb";
|
|
nvidia,pull = <2>;
|
|
nvidia,tristate = <0>;
|
|
};
|
|
conf_atd {
|
|
nvidia,pins = "atd", "ate", "cdev1", "csus",
|
|
"dap1", "dap2", "dap3", "dap4", "dte",
|
|
"dtf", "gpu", "gpu7", "gpv", "i2cp",
|
|
"rm", "sdio1", "slxa", "slxc", "slxd",
|
|
"slxk", "spdi", "spdo", "uac", "uda";
|
|
nvidia,pull = <0>;
|
|
nvidia,tristate = <0>;
|
|
};
|
|
conf_cdev2 {
|
|
nvidia,pins = "cdev2", "spia", "spib";
|
|
nvidia,pull = <1>;
|
|
nvidia,tristate = <1>;
|
|
};
|
|
conf_ck32 {
|
|
nvidia,pins = "ck32", "ddrc", "lc", "pmca",
|
|
"pmcb", "pmcc", "pmcd", "xm2c",
|
|
"xm2d";
|
|
nvidia,pull = <0>;
|
|
};
|
|
conf_crtp {
|
|
nvidia,pins = "crtp";
|
|
nvidia,pull = <0>;
|
|
nvidia,tristate = <1>;
|
|
};
|
|
conf_dta {
|
|
nvidia,pins = "dta", "dtb", "dtc", "dtd",
|
|
"spid", "spif";
|
|
nvidia,pull = <1>;
|
|
nvidia,tristate = <0>;
|
|
};
|
|
conf_gme {
|
|
nvidia,pins = "gme", "owc", "pta", "spic";
|
|
nvidia,pull = <2>;
|
|
nvidia,tristate = <1>;
|
|
};
|
|
conf_ld17_0 {
|
|
nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
|
|
"ld23_22";
|
|
nvidia,pull = <1>;
|
|
};
|
|
conf_ls {
|
|
nvidia,pins = "ls", "pmce";
|
|
nvidia,pull = <2>;
|
|
};
|
|
drive_dap1 {
|
|
nvidia,pins = "drive_dap1";
|
|
nvidia,high-speed-mode = <0>;
|
|
nvidia,schmitt = <1>;
|
|
nvidia,low-power-mode = <0>;
|
|
nvidia,pull-down-strength = <0>;
|
|
nvidia,pull-up-strength = <0>;
|
|
nvidia,slew-rate-rising = <0>;
|
|
nvidia,slew-rate-falling = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
i2s@70002800 {
|
|
status = "okay";
|
|
};
|
|
|
|
serial@70006000 {
|
|
status = "okay";
|
|
clock-frequency = <216000000>;
|
|
};
|
|
|
|
i2c@7000d000 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
|
|
codec: codec@1a {
|
|
compatible = "wlf,wm8753";
|
|
reg = <0x1a>;
|
|
};
|
|
|
|
tca6416: gpio@20 {
|
|
compatible = "ti,tca6416";
|
|
reg = <0x20>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
};
|
|
|
|
max8907@3c {
|
|
compatible = "maxim,max8907";
|
|
reg = <0x3c>;
|
|
interrupts = <0 86 0x4>;
|
|
|
|
maxim,system-power-controller;
|
|
|
|
mbatt-supply = <&usb0_vbus_reg>;
|
|
in-v1-supply = <&mbatt_reg>;
|
|
in-v2-supply = <&mbatt_reg>;
|
|
in-v3-supply = <&mbatt_reg>;
|
|
in1-supply = <&mbatt_reg>;
|
|
in2-supply = <&nvvdd_sv3_reg>;
|
|
in3-supply = <&mbatt_reg>;
|
|
in4-supply = <&mbatt_reg>;
|
|
in5-supply = <&mbatt_reg>;
|
|
in6-supply = <&mbatt_reg>;
|
|
in7-supply = <&mbatt_reg>;
|
|
in8-supply = <&mbatt_reg>;
|
|
in9-supply = <&mbatt_reg>;
|
|
in10-supply = <&mbatt_reg>;
|
|
in11-supply = <&mbatt_reg>;
|
|
in12-supply = <&mbatt_reg>;
|
|
in13-supply = <&mbatt_reg>;
|
|
in14-supply = <&mbatt_reg>;
|
|
in15-supply = <&mbatt_reg>;
|
|
in16-supply = <&mbatt_reg>;
|
|
in17-supply = <&nvvdd_sv3_reg>;
|
|
in18-supply = <&nvvdd_sv3_reg>;
|
|
in19-supply = <&mbatt_reg>;
|
|
in20-supply = <&mbatt_reg>;
|
|
|
|
regulators {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mbatt_reg: regulator@0 {
|
|
reg = <0>;
|
|
regulator-compatible = "mbatt";
|
|
regulator-name = "vbat_pmu";
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@1 {
|
|
reg = <1>;
|
|
regulator-compatible = "sd1";
|
|
regulator-name = "nvvdd_sv1,vdd_cpu_pmu";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1000000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@2 {
|
|
reg = <2>;
|
|
regulator-compatible = "sd2";
|
|
regulator-name = "nvvdd_sv2,vdd_core";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
nvvdd_sv3_reg: regulator@3 {
|
|
reg = <3>;
|
|
regulator-compatible = "sd3";
|
|
regulator-name = "nvvdd_sv3";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@4 {
|
|
reg = <4>;
|
|
regulator-compatible = "ldo1";
|
|
regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@5 {
|
|
reg = <5>;
|
|
regulator-compatible = "ldo2";
|
|
regulator-name = "nvvdd_ldo2,avdd_pll*";
|
|
regulator-min-microvolt = <1100000>;
|
|
regulator-max-microvolt = <1100000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@6 {
|
|
reg = <6>;
|
|
regulator-compatible = "ldo3";
|
|
regulator-name = "nvvdd_ldo3,vcom_1v8b";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@7 {
|
|
reg = <7>;
|
|
regulator-compatible = "ldo4";
|
|
regulator-name = "nvvdd_ldo4,avdd_usb*";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@8 {
|
|
reg = <8>;
|
|
regulator-compatible = "ldo5";
|
|
regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@9 {
|
|
reg = <9>;
|
|
regulator-compatible = "ldo6";
|
|
regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
regulator@10 {
|
|
reg = <10>;
|
|
regulator-compatible = "ldo7";
|
|
regulator-name = "nvvdd_ldo7,avddio_audio";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@11 {
|
|
reg = <11>;
|
|
regulator-compatible = "ldo8";
|
|
regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
};
|
|
|
|
regulator@12 {
|
|
reg = <12>;
|
|
regulator-compatible = "ldo9";
|
|
regulator-name = "nvvdd_ldo9,avdd_cam*";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
regulator@13 {
|
|
reg = <13>;
|
|
regulator-compatible = "ldo10";
|
|
regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@14 {
|
|
reg = <14>;
|
|
regulator-compatible = "ldo11";
|
|
regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
regulator@15 {
|
|
reg = <15>;
|
|
regulator-compatible = "ldo12";
|
|
regulator-name = "nvvdd_ldo12,vddio_sdio";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@16 {
|
|
reg = <16>;
|
|
regulator-compatible = "ldo13";
|
|
regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
regulator@17 {
|
|
reg = <17>;
|
|
regulator-compatible = "ldo14";
|
|
regulator-name = "nvvdd_ldo14,avdd_vdac";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
regulator@18 {
|
|
reg = <18>;
|
|
regulator-compatible = "ldo15";
|
|
regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
};
|
|
|
|
regulator@19 {
|
|
reg = <19>;
|
|
regulator-compatible = "ldo16";
|
|
regulator-name = "nvvdd_ldo16,vdd_dbrtr";
|
|
regulator-min-microvolt = <1300000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
};
|
|
|
|
regulator@20 {
|
|
reg = <20>;
|
|
regulator-compatible = "ldo17";
|
|
regulator-name = "nvvdd_ldo17,vddio_mipi";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
};
|
|
|
|
regulator@21 {
|
|
reg = <21>;
|
|
regulator-compatible = "ldo18";
|
|
regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
};
|
|
|
|
regulator@22 {
|
|
reg = <22>;
|
|
regulator-compatible = "ldo19";
|
|
regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
};
|
|
|
|
regulator@23 {
|
|
reg = <23>;
|
|
regulator-compatible = "ldo20";
|
|
regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@24 {
|
|
reg = <24>;
|
|
regulator-compatible = "out5v";
|
|
regulator-name = "usb0_vbus_reg";
|
|
};
|
|
|
|
regulator@25 {
|
|
reg = <25>;
|
|
regulator-compatible = "out33v";
|
|
regulator-name = "pmu_out3v3";
|
|
};
|
|
|
|
regulator@26 {
|
|
reg = <26>;
|
|
regulator-compatible = "bbat";
|
|
regulator-name = "pmu_bbat";
|
|
regulator-min-microvolt = <2400000>;
|
|
regulator-max-microvolt = <2400000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@27 {
|
|
reg = <27>;
|
|
regulator-compatible = "sdby";
|
|
regulator-name = "vdd_aon";
|
|
regulator-always-on;
|
|
};
|
|
|
|
regulator@28 {
|
|
reg = <28>;
|
|
regulator-compatible = "vrtc";
|
|
regulator-name = "vrtc,pmu_vccadc";
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
pmc {
|
|
nvidia,invert-interrupt;
|
|
};
|
|
|
|
usb@c5000000 {
|
|
status = "okay";
|
|
nvidia,vbus-gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
|
|
};
|
|
|
|
usb@c5008000 {
|
|
status = "okay";
|
|
nvidia,vbus-gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
|
|
};
|
|
|
|
sdhci@c8000400 {
|
|
status = "okay";
|
|
wp-gpios = <&gpio 173 0>; /* gpio PV5 */
|
|
bus-width = <8>;
|
|
};
|
|
|
|
sdhci@c8000600 {
|
|
status = "okay";
|
|
bus-width = <8>;
|
|
};
|
|
|
|
regulators {
|
|
compatible = "simple-bus";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
usb0_vbus_reg: regulator {
|
|
compatible = "regulator-fixed";
|
|
reg = <0>;
|
|
regulator-name = "usb0_vbus";
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "nvidia,tegra-audio-wm8753-whistler",
|
|
"nvidia,tegra-audio-wm8753";
|
|
nvidia,model = "NVIDIA Tegra Whistler";
|
|
|
|
nvidia,audio-routing =
|
|
"Headphone Jack", "LOUT1",
|
|
"Headphone Jack", "ROUT1",
|
|
"MIC2", "Mic Jack",
|
|
"MIC2N", "Mic Jack";
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
nvidia,audio-codec = <&codec>;
|
|
};
|
|
};
|