David Riley 7892158a96 soc/tegra: pmc: move to using a restart handler ... The pmc driver was previously exporting tegra_pmc_restart, which was assigned to machine_desc.init_machine, taking precedence over the restart handlers registered through register_restart_handler(). Signed-off-by: David Riley <davidriley@chromium.org> [tomeu.vizoso@collabora.com: Rebased] Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> [treding@nvidia.com: minor cleanups] Signed-off-by: Thierry Reding <treding@nvidia.com>		2015-05-04 14:21:45 +02:00
..
board-paz00.c
board.h
common.h
cpuidle-tegra20.c	ARM: tegra20: Store CPU "resettable" status in IRAM	2015-05-04 12:58:19 +02:00
cpuidle-tegra30.c	Power management and ACPI updates for v4.1-rc1	2015-04-14 20:21:54 -07:00
cpuidle-tegra114.c	ARM: Tegra: Use explicit broadcast oneshot control function	2015-04-03 08:44:35 +02:00
cpuidle.c
cpuidle.h
flowctrl.c
flowctrl.h
headsmp.S
hotplug.c
io.c
iomap.h	ARM: tegra: remove old LIC support	2015-03-15 00:40:52 +00:00
irammap.h
irq.c	ARM: tegra: remove old LIC support	2015-03-15 00:40:52 +00:00
irq.h	ARM: tegra: remove old LIC support	2015-03-15 00:40:52 +00:00
Kconfig	clocksource: Build Tegra timer on 32-bit ARM only	2015-01-09 14:45:43 +01:00
Makefile
platsmp.c
pm-tegra20.c
pm-tegra30.c
pm.c
pm.h
reset-handler.S	ARM: tegra20: Store CPU "resettable" status in IRAM	2015-05-04 12:58:19 +02:00
reset.c
reset.h	ARM: tegra20: Store CPU "resettable" status in IRAM	2015-05-04 12:58:19 +02:00
sleep-tegra20.S	ARM: tegra20: Store CPU "resettable" status in IRAM	2015-05-04 12:58:19 +02:00
sleep-tegra30.S
sleep.h	ARM: tegra20: Store CPU "resettable" status in IRAM	2015-05-04 12:58:19 +02:00
sleep.S
tegra.c	soc/tegra: pmc: move to using a restart handler	2015-05-04 14:21:45 +02:00