mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 01:40:53 +07:00
5f97f7f940
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000 CPU and the AT32STK1000 development board. AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular emphasis on low power consumption and high code density. The AVR32 architecture is not binary compatible with earlier 8-bit AVR architectures. The AVR32 architecture, including the instruction set, is described by the AVR32 Architecture Manual, available from http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It features a 7-stage pipeline, 16KB instruction and data caches and a full Memory Management Unit. It also comes with a large set of integrated peripherals, many of which are shared with the AT91 ARM-based controllers from Atmel. Full data sheet is available from http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf while the CPU core implementation including caches and MMU is documented by the AVR32 AP Technical Reference, available from http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf Information about the AT32STK1000 development board can be found at http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918 including a BSP CD image with an earlier version of this patch, development tools (binaries and source/patches) and a root filesystem image suitable for booting from SD card. Alternatively, there's a preliminary "getting started" guide available at http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links to the sources and patches you will need in order to set up a cross-compiling environment for avr32-linux. This patch, as well as the other patches included with the BSP and the toolchain patches, is actively supported by Atmel Corporation. [dmccr@us.ibm.com: Fix more pxx_page macro locations] [bunk@stusta.de: fix `make defconfig'] Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave McCracken <dmccr@us.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
151 lines
3.5 KiB
C
151 lines
3.5 KiB
C
/*
|
|
* Copyright (C) 2004-2006 Atmel Corporation
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#include <linux/highmem.h>
|
|
#include <linux/unistd.h>
|
|
|
|
#include <asm/cacheflush.h>
|
|
#include <asm/cachectl.h>
|
|
#include <asm/processor.h>
|
|
#include <asm/uaccess.h>
|
|
|
|
/*
|
|
* If you attempt to flush anything more than this, you need superuser
|
|
* privileges. The value is completely arbitrary.
|
|
*/
|
|
#define CACHEFLUSH_MAX_LEN 1024
|
|
|
|
void invalidate_dcache_region(void *start, size_t size)
|
|
{
|
|
unsigned long v, begin, end, linesz;
|
|
|
|
linesz = boot_cpu_data.dcache.linesz;
|
|
|
|
//printk("invalidate dcache: %p + %u\n", start, size);
|
|
|
|
/* You asked for it, you got it */
|
|
begin = (unsigned long)start & ~(linesz - 1);
|
|
end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
|
|
|
|
for (v = begin; v < end; v += linesz)
|
|
invalidate_dcache_line((void *)v);
|
|
}
|
|
|
|
void clean_dcache_region(void *start, size_t size)
|
|
{
|
|
unsigned long v, begin, end, linesz;
|
|
|
|
linesz = boot_cpu_data.dcache.linesz;
|
|
begin = (unsigned long)start & ~(linesz - 1);
|
|
end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
|
|
|
|
for (v = begin; v < end; v += linesz)
|
|
clean_dcache_line((void *)v);
|
|
flush_write_buffer();
|
|
}
|
|
|
|
void flush_dcache_region(void *start, size_t size)
|
|
{
|
|
unsigned long v, begin, end, linesz;
|
|
|
|
linesz = boot_cpu_data.dcache.linesz;
|
|
begin = (unsigned long)start & ~(linesz - 1);
|
|
end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
|
|
|
|
for (v = begin; v < end; v += linesz)
|
|
flush_dcache_line((void *)v);
|
|
flush_write_buffer();
|
|
}
|
|
|
|
void invalidate_icache_region(void *start, size_t size)
|
|
{
|
|
unsigned long v, begin, end, linesz;
|
|
|
|
linesz = boot_cpu_data.icache.linesz;
|
|
begin = (unsigned long)start & ~(linesz - 1);
|
|
end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
|
|
|
|
for (v = begin; v < end; v += linesz)
|
|
invalidate_icache_line((void *)v);
|
|
}
|
|
|
|
static inline void __flush_icache_range(unsigned long start, unsigned long end)
|
|
{
|
|
unsigned long v, linesz;
|
|
|
|
linesz = boot_cpu_data.dcache.linesz;
|
|
for (v = start; v < end; v += linesz) {
|
|
clean_dcache_line((void *)v);
|
|
invalidate_icache_line((void *)v);
|
|
}
|
|
|
|
flush_write_buffer();
|
|
}
|
|
|
|
/*
|
|
* This one is called after a module has been loaded.
|
|
*/
|
|
void flush_icache_range(unsigned long start, unsigned long end)
|
|
{
|
|
unsigned long linesz;
|
|
|
|
linesz = boot_cpu_data.dcache.linesz;
|
|
__flush_icache_range(start & ~(linesz - 1),
|
|
(end + linesz - 1) & ~(linesz - 1));
|
|
}
|
|
|
|
/*
|
|
* This one is called from do_no_page(), do_swap_page() and install_page().
|
|
*/
|
|
void flush_icache_page(struct vm_area_struct *vma, struct page *page)
|
|
{
|
|
if (vma->vm_flags & VM_EXEC) {
|
|
void *v = kmap(page);
|
|
__flush_icache_range((unsigned long)v, (unsigned long)v + PAGE_SIZE);
|
|
kunmap(v);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* This one is used by copy_to_user_page()
|
|
*/
|
|
void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
|
|
unsigned long addr, int len)
|
|
{
|
|
if (vma->vm_flags & VM_EXEC)
|
|
flush_icache_range(addr, addr + len);
|
|
}
|
|
|
|
asmlinkage int sys_cacheflush(int operation, void __user *addr, size_t len)
|
|
{
|
|
int ret;
|
|
|
|
if (len > CACHEFLUSH_MAX_LEN) {
|
|
ret = -EPERM;
|
|
if (!capable(CAP_SYS_ADMIN))
|
|
goto out;
|
|
}
|
|
|
|
ret = -EFAULT;
|
|
if (!access_ok(VERIFY_WRITE, addr, len))
|
|
goto out;
|
|
|
|
switch (operation) {
|
|
case CACHE_IFLUSH:
|
|
flush_icache_range((unsigned long)addr,
|
|
(unsigned long)addr + len);
|
|
ret = 0;
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
}
|
|
|
|
out:
|
|
return ret;
|
|
}
|