mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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07658d9a65
This patch adds machines/boards dts{i} files for SPEAr1310 and SPEAr1340. Both
are based on ARM, Cortex A9 processor family.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
185 lines
4.0 KiB
Plaintext
185 lines
4.0 KiB
Plaintext
/*
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* DTS file for all SPEAr1310 SoCs
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*
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* Copyright 2012 Viresh Kumar <viresh.kumar@st.com>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "spear13xx.dtsi"
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/ {
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compatible = "st,spear1310";
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ahb {
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ahci@b1000000 {
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compatible = "snps,spear-ahci";
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reg = <0xb1000000 0x10000>;
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interrupts = <0 68 0x4>;
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status = "disabled";
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};
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ahci@b1800000 {
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compatible = "snps,spear-ahci";
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reg = <0xb1800000 0x10000>;
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interrupts = <0 69 0x4>;
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status = "disabled";
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};
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ahci@b4000000 {
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compatible = "snps,spear-ahci";
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reg = <0xb4000000 0x10000>;
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interrupts = <0 70 0x4>;
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status = "disabled";
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};
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gmac1: eth@5c400000 {
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compatible = "st,spear600-gmac";
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reg = <0x5c400000 0x8000>;
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interrupts = <0 95 0x4>;
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interrupt-names = "macirq";
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status = "disabled";
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};
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gmac2: eth@5c500000 {
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compatible = "st,spear600-gmac";
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reg = <0x5c500000 0x8000>;
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interrupts = <0 96 0x4>;
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interrupt-names = "macirq";
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status = "disabled";
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};
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gmac3: eth@5c600000 {
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compatible = "st,spear600-gmac";
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reg = <0x5c600000 0x8000>;
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interrupts = <0 97 0x4>;
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interrupt-names = "macirq";
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status = "disabled";
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};
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gmac4: eth@5c700000 {
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compatible = "st,spear600-gmac";
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reg = <0x5c700000 0x8000>;
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interrupts = <0 98 0x4>;
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interrupt-names = "macirq";
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status = "disabled";
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};
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spi1: spi@5d400000 {
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compatible = "arm,pl022", "arm,primecell";
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reg = <0x5d400000 0x1000>;
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interrupts = <0 99 0x4>;
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status = "disabled";
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};
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apb {
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i2c1: i2c@5cd00000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0x5cd00000 0x1000>;
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interrupts = <0 87 0x4>;
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status = "disabled";
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};
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i2c2: i2c@5ce00000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0x5ce00000 0x1000>;
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interrupts = <0 88 0x4>;
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status = "disabled";
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};
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i2c3: i2c@5cf00000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0x5cf00000 0x1000>;
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interrupts = <0 89 0x4>;
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status = "disabled";
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};
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i2c4: i2c@5d000000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0x5d000000 0x1000>;
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interrupts = <0 90 0x4>;
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status = "disabled";
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};
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i2c5: i2c@5d100000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0x5d100000 0x1000>;
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interrupts = <0 91 0x4>;
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status = "disabled";
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};
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i2c6: i2c@5d200000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0x5d200000 0x1000>;
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interrupts = <0 92 0x4>;
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status = "disabled";
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};
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i2c7: i2c@5d300000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,designware-i2c";
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reg = <0x5d300000 0x1000>;
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interrupts = <0 93 0x4>;
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status = "disabled";
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};
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serial@5c800000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x5c800000 0x1000>;
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interrupts = <0 82 0x4>;
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status = "disabled";
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};
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serial@5c900000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x5c900000 0x1000>;
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interrupts = <0 83 0x4>;
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status = "disabled";
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};
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serial@5ca00000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x5ca00000 0x1000>;
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interrupts = <0 84 0x4>;
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status = "disabled";
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};
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serial@5cb00000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x5cb00000 0x1000>;
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interrupts = <0 85 0x4>;
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status = "disabled";
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};
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serial@5cc00000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x5cc00000 0x1000>;
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interrupts = <0 86 0x4>;
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status = "disabled";
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};
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thermal@e07008c4 {
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st,thermal-flags = <0x7000>;
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};
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};
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};
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};
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