mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 11:18:45 +07:00
40f89ebfbd
The phy drivers for CS4340 and TN2020 are missing their
features attributes. Add them.
Fixes: 719655a149 ("net: phy: Replace phy driver features u32 with link_mode bitmap")
Reported-by: Scott Wood <oss@buserror.net>
Signed-off-by: Camelia Groza <camelia.groza@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
101 lines
2.5 KiB
C
101 lines
2.5 KiB
C
/*
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* Driver for Teranetics PHY
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*
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* Author: Shaohui Xie <Shaohui.Xie@freescale.com>
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*
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* Copyright 2015 Freescale Semiconductor, Inc.
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/mdio.h>
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#include <linux/phy.h>
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MODULE_DESCRIPTION("Teranetics PHY driver");
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MODULE_AUTHOR("Shaohui Xie <Shaohui.Xie@freescale.com>");
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MODULE_LICENSE("GPL v2");
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#define PHY_ID_TN2020 0x00a19410
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#define MDIO_PHYXS_LNSTAT_SYNC0 0x0001
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#define MDIO_PHYXS_LNSTAT_SYNC1 0x0002
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#define MDIO_PHYXS_LNSTAT_SYNC2 0x0004
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#define MDIO_PHYXS_LNSTAT_SYNC3 0x0008
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#define MDIO_PHYXS_LNSTAT_ALIGN 0x1000
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#define MDIO_PHYXS_LANE_READY (MDIO_PHYXS_LNSTAT_SYNC0 | \
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MDIO_PHYXS_LNSTAT_SYNC1 | \
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MDIO_PHYXS_LNSTAT_SYNC2 | \
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MDIO_PHYXS_LNSTAT_SYNC3 | \
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MDIO_PHYXS_LNSTAT_ALIGN)
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static int teranetics_aneg_done(struct phy_device *phydev)
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{
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/* auto negotiation state can only be checked when using copper
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* port, if using fiber port, just lie it's done.
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*/
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if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93))
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return genphy_c45_aneg_done(phydev);
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return 1;
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}
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static int teranetics_read_status(struct phy_device *phydev)
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{
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int reg;
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phydev->link = 1;
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phydev->speed = SPEED_10000;
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phydev->duplex = DUPLEX_FULL;
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if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) {
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reg = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT);
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if (reg < 0 ||
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!((reg & MDIO_PHYXS_LANE_READY) == MDIO_PHYXS_LANE_READY)) {
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phydev->link = 0;
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return 0;
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}
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reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1);
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if (reg < 0 || !(reg & MDIO_STAT1_LSTATUS))
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phydev->link = 0;
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}
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return 0;
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}
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static int teranetics_match_phy_device(struct phy_device *phydev)
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{
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return phydev->c45_ids.device_ids[3] == PHY_ID_TN2020;
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}
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static struct phy_driver teranetics_driver[] = {
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{
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.phy_id = PHY_ID_TN2020,
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.phy_id_mask = 0xffffffff,
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.name = "Teranetics TN2020",
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.features = PHY_10GBIT_FEATURES,
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.soft_reset = gen10g_no_soft_reset,
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.aneg_done = teranetics_aneg_done,
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.config_init = gen10g_config_init,
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.config_aneg = gen10g_config_aneg,
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.read_status = teranetics_read_status,
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.match_phy_device = teranetics_match_phy_device,
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},
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};
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module_phy_driver(teranetics_driver);
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static struct mdio_device_id __maybe_unused teranetics_tbl[] = {
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{ PHY_ID_TN2020, 0xffffffff },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, teranetics_tbl);
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