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387720c938
Since everybody copied my own mistake from the DT binding example, let's address all the offenders in one swift go. Most of them got the CPU interface size wrong (4kB, while it should be 8kB), except for both keystone platforms which got the control interface wrong (4kB instead of 8kB). In a few cases where I knew for sure what implementation was used, I've added the "arm,gic-400" compatible string. I'm 99% sure that this is what everyone is using, but short of having the TRM for all the other SoCs, I've left them alone. Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
143 lines
3.5 KiB
Plaintext
143 lines
3.5 KiB
Plaintext
/*
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* Device Tree Source for K2G SOC
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*
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* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/pinctrl/keystone.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "ti,k2g","ti,keystone";
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model = "Texas Instruments K2G SoC";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &uart0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a15";
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device_type = "cpu";
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reg = <0>;
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};
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};
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gic: interrupt-controller@02561000 {
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compatible = "arm,gic-400", "arm,cortex-a15-gic";
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#interrupt-cells = <3>;
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interrupt-controller;
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reg = <0x0 0x02561000 0x0 0x1000>,
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<0x0 0x02562000 0x0 0x2000>,
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<0x0 0x02564000 0x0 0x2000>,
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<0x0 0x02566000 0x0 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts =
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<GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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pmu {
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compatible = "arm,cortex-a15-pmu";
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interrupts = <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>;
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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#pinctrl-cells = <1>;
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compatible = "ti,keystone","simple-bus";
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ranges = <0x0 0x0 0x0 0xc0000000>;
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dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>;
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msm_ram: msmram@0c000000 {
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compatible = "mmio-sram";
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reg = <0x0c000000 0x100000>;
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ranges = <0x0 0x0c000000 0x100000>;
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#address-cells = <1>;
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#size-cells = <1>;
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sram-bm@f7000 {
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reg = <0x000f7000 0x8000>;
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};
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};
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k2g_pinctrl: pinmux@02621000 {
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compatible = "pinctrl-single";
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reg = <0x02621000 0x410>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x001b0007>;
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};
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devctrl: device-state-control@02620000 {
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compatible = "ti,keystone-devctrl", "syscon";
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reg = <0x02620000 0x1000>;
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};
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uart0: serial@02530c00 {
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compatible = "ti,da830-uart", "ns16550a";
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current-speed = <115200>;
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reg-shift = <2>;
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reg-io-width = <4>;
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reg = <0x02530c00 0x100>;
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interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
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clock-frequency = <200000000>;
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status = "disabled";
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};
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kirq0: keystone_irq@026202a0 {
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compatible = "ti,keystone-irq";
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interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
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interrupt-controller;
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#interrupt-cells = <1>;
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ti,syscon-dev = <&devctrl 0x2a0>;
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};
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dspgpio0: keystone_dsp_gpio@02620240 {
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compatible = "ti,keystone-dsp-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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gpio,syscon-dev = <&devctrl 0x240>;
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};
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msgmgr: msgmgr@02a00000 {
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compatible = "ti,k2g-message-manager";
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#mbox-cells = <2>;
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reg-names = "queue_proxy_region",
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"queue_state_debug_region";
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reg = <0x02a00000 0x400000>, <0x028c3400 0x400>;
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interrupt-names = "rx_005",
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"rx_057";
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interrupts = <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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