Stephen Warren abf80c276d ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi ... No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: Stephen Warren <swarren@nvidia.com>		2013-01-28 11:24:09 -07:00
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bootp
compressed	ARM: 7600/1: include CONFIG_DEBUG_LL_INCLUDE rather than mach/debug-macro.S	2012-12-16 10:04:23 +00:00
dts	ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi	2013-01-28 11:24:09 -07:00
.gitignore	ARM: devicetree: Add .dtb files to arch/arm/boot/.gitignore	2012-01-30 11:47:37 -07:00
install.sh
Makefile	Device tree changes for v3.8	2012-12-11 11:30:41 -08:00