linux_dsm_epyc7002/arch/arm/mach-mvebu
Russell King 02b4e2756e ARM: v7 setup function should invalidate L1 cache
All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU.  This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.

This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.

ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state.  Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.

Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-06-01 11:30:26 +01:00
..
include/mach ARM: mvebu: Simplify headers and make local 2014-02-22 21:19:59 +00:00
armada-370-xp.h ARM: mvebu: Clean-up the Armada XP support 2014-11-22 02:13:24 +00:00
board-v7.c ARM: SoC platform updates for v4.1 2015-04-22 09:08:39 -07:00
board.h ARM: Kirkwood: Add setup file for netxbig LEDs 2014-06-20 23:47:27 +00:00
coherency_ll.S ARM: mvebu: make the coherency_ll.S functions work with no coherency fabric 2014-11-22 01:49:27 +00:00
coherency.c ARM: make of_device_ids const 2015-02-19 09:44:25 +01:00
coherency.h ARM: mvebu: Remove the unused argument of set_cpu_coherent() 2014-05-08 16:18:52 +00:00
common.h ARM: mvebu: implement suspend/resume support for Armada XP 2014-11-30 16:40:12 +00:00
cpu-reset.c ARM: mvebu: Clean-up the Armada XP support 2014-11-22 02:13:24 +00:00
dove.c ARM: mvebu: add __initconst specifiers on DT_MACHINE_START dt_compat tables 2015-03-04 14:56:21 +01:00
headsmp-a9.S ARM: v7 setup function should invalidate L1 cache 2015-06-01 11:30:26 +01:00
headsmp.S ARM: mvebu: Split low level functions to manipulate HW coherency 2014-05-08 16:18:54 +00:00
Kconfig ARM: mvebu: add core support for Armada 39x 2015-03-04 15:35:38 +01:00
kirkwood-pm.c ARM: mvebu: Simplify headers and make local 2014-02-22 21:19:59 +00:00
kirkwood-pm.h ARM: mvebu: Move kirkwood DT boards into mach-mvebu 2014-02-22 21:19:55 +00:00
kirkwood.c ARM: mvebu: add __initconst specifiers on DT_MACHINE_START dt_compat tables 2015-03-04 14:56:21 +01:00
kirkwood.h ARM: mvebu: Simplify headers and make local 2014-02-22 21:19:59 +00:00
Makefile ARM: mvebu: Armada XP GP specific suspend/resume code 2014-11-30 16:40:14 +00:00
mvebu-soc-id.c ARM: mvebu: Use system controller to get the soc id when possible 2014-06-30 17:40:59 +00:00
mvebu-soc-id.h ARM: mvebu: Update the SoC ID and revision definitions 2015-01-09 09:22:53 -06:00
netxbig.c ARM: Kirkwood: Add setup file for netxbig LEDs 2014-06-20 23:47:27 +00:00
platsmp-a9.c ARM: mvebu: add core support for Armada 39x 2015-03-04 15:35:38 +01:00
platsmp.c mvebu SoC suspend changes for v3.19 2014-12-04 16:46:43 +01:00
pm-board.c ARM: mvebu: Armada XP GP specific suspend/resume code 2014-11-30 16:40:14 +00:00
pm.c ARM: mvebu: implement suspend/resume support for Armada XP 2014-11-30 16:40:12 +00:00
pmsu_ll.S mvebu SoC suspend changes for v3.19 2014-12-04 16:46:43 +01:00
pmsu.c ARM: mvebu: Disable CPU Idle on Armada 38x 2015-03-31 18:47:33 +02:00
pmsu.h mvebu SoC suspend changes for v3.19 2014-12-04 16:46:43 +01:00
system-controller.c ARM: mvebu: build armada375-smp code conditionally 2015-02-18 12:20:29 +01:00