linux_dsm_epyc7002/arch/arc/plat-eznps
Liav Rehana abd8926bff ARC: [plat-eznps] Update the init sequence of aux regs per cpu.
This commit add new configuration that enables us to distinguish
between building the kernel for platforms that have a different set
of auxiliary registers for each cpu and platforms that have a shared
set of auxiliary registers across every thread in each core.
On platforms that implement a different set of auxiliary registers
disabling this configuration insures that we initialize registers on
every cpu and not just for the first thread of the core.
Example for non shared registers is working with EZsim (non silicon)

Signed-off-by: Liav Rehana <liavr@mellanox.com>
Signed-off-by: Noam Camus <noamca@mellanox.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2017-08-28 15:17:36 -07:00
..
include/plat ARC: [plat-eznps] use schd.wft instruction instead of sleep at idle task 2017-08-28 15:17:36 -07:00
entry.S ARC: [plat-eznps] Update the init sequence of aux regs per cpu. 2017-08-28 15:17:36 -07:00
Kconfig ARC: [plat-eznps] Update the init sequence of aux regs per cpu. 2017-08-28 15:17:36 -07:00
Makefile ARC: [plat-eznps] Add eznps platform 2016-05-09 09:32:32 +05:30
mtm.c ARC: [plat-eznps] new command line argument for HW scheduler at MTM 2017-08-28 15:17:36 -07:00
platform.c ARC: [plat-eznps] Add eznps platform 2016-05-09 09:32:32 +05:30
smp.c ARC: [plat-eznps] remove IPI clear from SMP operations 2016-11-08 09:25:18 -08:00