linux_dsm_epyc7002/drivers/gpu/drm/msm/adreno
Jordan Crouse abccb9fe32 drm/msm/a6xx: Add zap shader load
The a6xx GPU powers on in secure mode which restricts what memory it can
write to. To get out of secure mode the GPU driver can write to
REG_A6XX_RBBM_SECVID_TRUST_CNTL but on targets that are "secure" that
register region is blocked and writes will cause the system to go down.

For those targets we need to execute a special sequence that involves
loadinga special shader that clears the GPU registers and use a PM4
sequence to pull the GPU out of secure. Add support for loading the zap
shader and executing the secure sequence. For targets that do not support
SCM or the specific SCM sequence this should fail and we would fall back
to writing the register.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2019-04-21 07:37:17 -07:00
..
a2xx_gpu.c drm/msm: implement a2xx mmu 2018-12-11 13:07:10 -05:00
a2xx_gpu.h drm/msm/adreno: add a2xx 2018-12-11 13:07:06 -05:00
a2xx.xml.h drm/msm: update generated headers 2018-12-11 13:05:27 -05:00
a3xx_gpu.c drm: msm: Use DRM_DEV_* instead of dev_* 2018-12-11 13:05:22 -05:00
a3xx_gpu.h drm/msm: Remove uneeded platform dev members 2017-08-02 07:57:02 -04:00
a3xx.xml.h drm/msm: update generated headers 2018-12-11 13:05:27 -05:00
a4xx_gpu.c drm: msm: Use DRM_DEV_* instead of dev_* 2018-12-11 13:05:22 -05:00
a4xx_gpu.h drm/msm: Remove uneeded platform dev members 2017-08-02 07:57:02 -04:00
a4xx.xml.h drm/msm: update generated headers 2018-12-11 13:05:27 -05:00
a5xx_debugfs.c drm/msm: Count how many times iova memory is pinned 2018-12-11 13:05:32 -05:00
a5xx_gpu.c drm/msm/gpu: Move zap shader loading to adreno 2019-04-21 07:37:16 -07:00
a5xx_gpu.h drm/msm: add a5xx specific debugfs 2018-02-20 10:41:20 -05:00
a5xx_power.c drm/msm: Add a name field for gem objects 2018-12-11 13:06:59 -05:00
a5xx_preempt.c drm/msm: Add a name field for gem objects 2018-12-11 13:06:59 -05:00
a5xx.xml.h drm/msm: update generated headers 2018-12-11 13:05:27 -05:00
a6xx_gmu.c msm/drm/a6xx: Turn off the GMU if resume fails 2019-04-19 11:50:06 -07:00
a6xx_gmu.h drm/msm/a6xx: Remove an unused struct member 2019-04-19 11:50:06 -07:00
a6xx_gmu.xml.h drm/msm: update generated headers 2018-12-11 13:05:27 -05:00
a6xx_gpu_state.c drm/msm/a6xx: Add a name for the crashdumper buffer 2018-12-11 13:07:09 -05:00
a6xx_gpu_state.h drm/msm/a6xx: Add a6xx gpu state 2018-12-11 13:05:30 -05:00
a6xx_gpu.c drm/msm/a6xx: Add zap shader load 2019-04-21 07:37:17 -07:00
a6xx_gpu.h drm/msm/a6xx: Make GMU reset useful 2019-04-19 11:50:06 -07:00
a6xx_hfi.c drm: msm: Use DRM_DEV_* instead of dev_* 2018-12-11 13:05:22 -05:00
a6xx_hfi.h drm/msm: Add A6XX device support 2018-08-10 18:49:18 -04:00
a6xx.xml.h drm/msm: update generated headers 2018-12-11 13:05:27 -05:00
adreno_common.xml.h drm/msm: update generated headers 2018-12-11 13:05:27 -05:00
adreno_device.c drm/msm/a6xx: Add zap shader load 2019-04-21 07:37:17 -07:00
adreno_gpu.c drm/msm/gpu: Move zap shader loading to adreno 2019-04-21 07:37:16 -07:00
adreno_gpu.h drm/msm/gpu: Move zap shader loading to adreno 2019-04-21 07:37:16 -07:00
adreno_pm4.xml.h drm/msm: update generated headers 2018-12-11 13:05:27 -05:00