mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-01 19:26:45 +07:00
7a96c6b22e
On machines using the Apple U4 bridge (AKA IBM CPC945) PCIe interface such as the latest generation G5 machines x16 slot or the x16 slot of the PowerStation, MSIs are currently broken (and will oops when enabling). This fixes the oops and implements proper support for those. Instead of using the PCIe <-> HT bridge conversion, on such slots we need to use a bunch of magic registers in the bridge as the MSI target, encoding the interrupt number in the low bits of the address itself Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
104 lines
2.4 KiB
C
104 lines
2.4 KiB
C
/*
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* Copyright 2006-2007, Michael Ellerman, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2 of the
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* License.
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*
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*/
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#include <linux/irq.h>
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#include <linux/bitmap.h>
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#include <linux/msi.h>
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#include <asm/mpic.h>
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#include <asm/prom.h>
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#include <asm/hw_irq.h>
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#include <asm/ppc-pci.h>
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#include <asm/msi_bitmap.h>
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#include <sysdev/mpic.h>
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void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
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{
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/* The mpic calls this even when there is no allocator setup */
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if (!mpic->msi_bitmap.bitmap)
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return;
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);
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}
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#ifdef CONFIG_MPIC_U3_HT_IRQS
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static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
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{
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irq_hw_number_t hwirq;
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struct irq_host_ops *ops = mpic->irqhost->ops;
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struct device_node *np;
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int flags, index, i;
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struct of_irq oirq;
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pr_debug("mpic: found U3, guessing msi allocator setup\n");
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/* Reserve source numbers we know are reserved in the HW.
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*
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* This is a bit of a mix of U3 and U4 reserves but that's going
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* to work fine, we have plenty enugh numbers left so let's just
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* mark anything we don't like reserved.
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*/
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for (i = 0; i < 8; i++)
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
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for (i = 42; i < 46; i++)
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
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for (i = 100; i < 105; i++)
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
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for (i = 124; i < mpic->irq_count; i++)
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i);
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np = NULL;
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while ((np = of_find_all_nodes(np))) {
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pr_debug("mpic: mapping hwirqs for %s\n", np->full_name);
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index = 0;
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while (of_irq_map_one(np, index++, &oirq) == 0) {
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ops->xlate(mpic->irqhost, NULL, oirq.specifier,
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oirq.size, &hwirq, &flags);
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msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq);
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}
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}
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return 0;
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}
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#else
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static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
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{
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return -1;
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}
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#endif
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int mpic_msi_init_allocator(struct mpic *mpic)
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{
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int rc;
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rc = msi_bitmap_alloc(&mpic->msi_bitmap, mpic->irq_count,
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mpic->irqhost->of_node);
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if (rc)
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return rc;
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rc = msi_bitmap_reserve_dt_hwirqs(&mpic->msi_bitmap);
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if (rc > 0) {
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if (mpic->flags & MPIC_U3_HT_IRQS)
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rc = mpic_msi_reserve_u3_hwirqs(mpic);
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if (rc) {
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msi_bitmap_free(&mpic->msi_bitmap);
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return rc;
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}
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}
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return 0;
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}
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