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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1d7f1589d3
This interface was designed for streaming, but write_init's buf argument has an unclear purpose. Define it to be the first bytes of the bitstream. Each driver gets to set how many bytes (at most) it wants to see. Short bitstreams will be passed through as-is, while long ones will be truncated. The intent is to allow drivers to peek at the header before the transfer actually starts. Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Acked-by: Alan Tull <atull@opensource.altera.com>
149 lines
4.9 KiB
C
149 lines
4.9 KiB
C
/*
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* FPGA Framework
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*
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* Copyright (C) 2013-2015 Altera Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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#ifndef _LINUX_FPGA_MGR_H
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#define _LINUX_FPGA_MGR_H
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struct fpga_manager;
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/**
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* enum fpga_mgr_states - fpga framework states
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* @FPGA_MGR_STATE_UNKNOWN: can't determine state
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* @FPGA_MGR_STATE_POWER_OFF: FPGA power is off
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* @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up
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* @FPGA_MGR_STATE_RESET: FPGA in reset state
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* @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress
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* @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed
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* @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming
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* @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage
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* @FPGA_MGR_STATE_WRITE: writing image to FPGA
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* @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA
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* @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps
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* @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE
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* @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating
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*/
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enum fpga_mgr_states {
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/* default FPGA states */
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FPGA_MGR_STATE_UNKNOWN,
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FPGA_MGR_STATE_POWER_OFF,
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FPGA_MGR_STATE_POWER_UP,
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FPGA_MGR_STATE_RESET,
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/* getting an image for loading */
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FPGA_MGR_STATE_FIRMWARE_REQ,
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FPGA_MGR_STATE_FIRMWARE_REQ_ERR,
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/* write sequence: init, write, complete */
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FPGA_MGR_STATE_WRITE_INIT,
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FPGA_MGR_STATE_WRITE_INIT_ERR,
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FPGA_MGR_STATE_WRITE,
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FPGA_MGR_STATE_WRITE_ERR,
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FPGA_MGR_STATE_WRITE_COMPLETE,
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FPGA_MGR_STATE_WRITE_COMPLETE_ERR,
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/* fpga is programmed and operating */
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FPGA_MGR_STATE_OPERATING,
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};
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/*
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* FPGA Manager flags
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* FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported
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* FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting
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*/
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#define FPGA_MGR_PARTIAL_RECONFIG BIT(0)
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#define FPGA_MGR_EXTERNAL_CONFIG BIT(1)
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/**
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* struct fpga_image_info - information specific to a FPGA image
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* @flags: boolean flags as defined above
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* @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
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* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
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*/
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struct fpga_image_info {
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u32 flags;
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u32 enable_timeout_us;
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u32 disable_timeout_us;
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};
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/**
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* struct fpga_manager_ops - ops for low level fpga manager drivers
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* @initial_header_size: Maximum number of bytes that should be passed into write_init
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* @state: returns an enum value of the FPGA's state
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* @write_init: prepare the FPGA to receive confuration data
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* @write: write count bytes of configuration data to the FPGA
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* @write_complete: set FPGA to operating state after writing is done
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* @fpga_remove: optional: Set FPGA into a specific state during driver remove
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*
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* fpga_manager_ops are the low level functions implemented by a specific
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* fpga manager driver. The optional ones are tested for NULL before being
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* called, so leaving them out is fine.
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*/
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struct fpga_manager_ops {
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size_t initial_header_size;
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enum fpga_mgr_states (*state)(struct fpga_manager *mgr);
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int (*write_init)(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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const char *buf, size_t count);
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int (*write)(struct fpga_manager *mgr, const char *buf, size_t count);
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int (*write_complete)(struct fpga_manager *mgr,
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struct fpga_image_info *info);
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void (*fpga_remove)(struct fpga_manager *mgr);
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};
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/**
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* struct fpga_manager - fpga manager structure
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* @name: name of low level fpga manager
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* @dev: fpga manager device
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* @ref_mutex: only allows one reference to fpga manager
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* @state: state of fpga manager
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* @mops: pointer to struct of fpga manager ops
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* @priv: low level driver private date
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*/
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struct fpga_manager {
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const char *name;
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struct device dev;
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struct mutex ref_mutex;
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enum fpga_mgr_states state;
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const struct fpga_manager_ops *mops;
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void *priv;
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};
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#define to_fpga_manager(d) container_of(d, struct fpga_manager, dev)
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int fpga_mgr_buf_load(struct fpga_manager *mgr, struct fpga_image_info *info,
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const char *buf, size_t count);
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int fpga_mgr_firmware_load(struct fpga_manager *mgr,
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struct fpga_image_info *info,
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const char *image_name);
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struct fpga_manager *of_fpga_mgr_get(struct device_node *node);
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struct fpga_manager *fpga_mgr_get(struct device *dev);
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void fpga_mgr_put(struct fpga_manager *mgr);
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int fpga_mgr_register(struct device *dev, const char *name,
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const struct fpga_manager_ops *mops, void *priv);
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void fpga_mgr_unregister(struct device *dev);
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#endif /*_LINUX_FPGA_MGR_H */
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